Method of manufacturing semiconductor device and semiconductor device manufacturing apparatus used in it
View Patent ↗A semiconductor device manufacturing apparatus includes a pre-alignment section having a pre-alignment camera which is adapted to recognize marks formed on a multi-arrayed substrate, a dicing section which dices the substrate with a cutting blade in accordance with information resulting from image recognition of the marks by the pre-alignment section, and an xy table which carries the substrate. The pre-alignment section recognizes in advance all marks on the substrate based on image recognition thereby to determine the dicing positions, and the dicing section merely recognizes a few points of the substrate with an alignment camera. Consequently, pre-alignment and dicing can take place concurrently, and the throughput of the dicing process can be improved.
1. A method of manufacturing a semiconductor device by using a multi-arrayed substrate having a plurality of semiconductor device formation areas, said method comprising the steps of:
(a) preparing a plurality of multi-arrayed substrates;
(b) mounting a plurality of semiconductor chips over the multi-arrayed substrates respectively;
(c) resin-sealing the semiconductor chips which have been mounted over the multi-arrayed substrates;
(d) placing a first multi-arrayed substrate out of the multi-arrayed substrates in a first processing section;
(e) implementing the image recognition for the first multi-arrayed substrate out of the multi-arrayed substrates by using a first alignment camera in the first processing section;
(f) conveying the first multi-arrayed substrate from the first processing section to a second processing section, and, placing a second multi-arrayed substrate out of the multi-arrayed substrates in the first processing section; and
(g) dicing the first multi-arrayed substrate into individual semiconductor devices in the second processing section, and, at the same time, implementing the image recognition for the second multi-arrayed substrate in the first processing section.
2. A semiconductor device manufacturing method according to claim 1 , wherein said image recognition step recognizes a plurality of marks formed along the edges of each multi-arrayed substrate, determines running lines of a cutting blade based on pairs of confronting marks recognized, and operates said cutting blade to run on the determined running lines thereby to dice the substrate.
3. A semiconductor device manufacturing method according to claim 1 , wherein said multi-arrayed substrate comprises a multi-layer substrate having a plurality of wiring layers.
4. A semiconductor device manufacturing method according to claim 1 , wherein said multi-arrayed substrate has a formation of plating power feed lines, said plating power feed lines being cut by dicing.
5. A semiconductor device manufacturing method according to claim 1 , wherein said marks to be recognized at said image recognition are formed of a conductor pattern.
6. A semiconductor device manufacturing method according to claim 1 , wherein said multi-arrayed substrate comprises a multi-layer substrate having a plurality of wiring layers, with each wiring layer having a formation of plating power feed lines.
7. A semiconductor device manufacturing method according to claim 1 , wherein before the dicing step, implementing the image recognition for the first multi-arrayed substrate by using a second alignment camera in the second processing section.
8. A semiconductor device manufacturing method according to claim 7 , wherein recognized points by using the second alignment camera are fewer than that by using the first alignment camera.
9. A semiconductor device manufacturing method according to claim 7 , wherein recognized points by using the second alignment camera are two points.
10. A semiconductor device manufacturing method according to claim 1 , wherein said image recognition step recognizes a plurality of marks of each multi-arrayed substrate, and wherein in the second processing section only a few of said plurality of marks are recognized for alignment in the second processing section.
11. A semiconductor device manufacturing method according to claim 1 , further comprising a marking process for a third multi-arrayed substrate of said plurality of multi-arrayed substrates; and wherein the marking process for the third multi-arrayed substrate takes place concurrently with the dicing of the first multi-arrayed substrate in the second processing section and implementing the image recognition for the second multi-arrayed substrate in the first processing section.
12. A semiconductor device manufacturing method according to claim 1 , wherein the semiconductor device manufactured is a ball grid array device.
13. A method of manufacturing a semiconductor device by using a multi-arrayed substrate having a plurality of semiconductor device formation areas, said method comprising the steps of:
(a) preparing a plurality of multi-arrayed substrates, with each substrate formed with semiconductor device formation areas;
(b) mounting a plurality of semiconductor chips over the plurality of the semiconductor device formation areas respectively;
(c) connecting electrically between the semiconductor chips and the multi-arrayed substrates;
(d) sealing the overall semiconductor device formation areas of the multi-arrayed substrate by means of a cavity of a resin formation mold and feeding sealing resin into the cavity thereby to resin-seal the semiconductor chips;
(e) implementing the image recognition for a first multi-arrayed substrate out of the multi-arrayed substrates; and
(f) dicing, after the step (e), the overall resin-sealed portion of the first multi-arrayed substrate into individual semiconductor devices, and, at the same time, implementing the image recognition for a second multi-arrayed substrate out of the multi-arrayed substrates.
14. A semiconductor device manufacturing method according to claim 13 , including the steps of:
placing the first multi-arrayed substrate out of the multi-arrayed substrates in a first processing section to implement the image recognition, and thereafter moving the first multi-arrayed substrate to place in a second processing section and placing a second multi-arrayed substrate in said first processing section; and
dicing the block molded portion of the first multi-arrayed substrate and the first multi-arrayed substrate together into individual semiconductor devices in said second processing section and, at the same time, implementing the image recognition for the second multi-arrayed substrate in said first processing section.
15. A semiconductor device manufacturing method according to claim 13 , wherein said semiconductor chip mounting step (b) stacks the semiconductor chips in multiple stages.
16. A semiconductor device manufacturing method according to claim 13 , wherein the step (e) recognizes a plurality of marks formed along the edges of each multi-arrayed substrate, determines running lines of a cutting blade based on pairs of confronting marks recognized, and operates said cutting blade to run on the determined running lines during the dicing, thereby to dice the substrate.
17. A semiconductor device manufacturing method according to claim 13 , wherein the semiconductor device manufactured is a ball grid array device.