IP Library Granted Patent US 7,650,443
Granted Patent B1
US 7,650,443 · App. 10/896,562 · Granted Jan 19, 2010

Methods and apparatus for allocating access to a host device buffer

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Quick Facts
Patent No.
US 7,650,443
App. No.
10/896,562
Granted
Jan 19, 2010
Kind
B1
Abstract

Methods and apparatus for allocating access to a buffer of a host device to buffer data transferred between a controller of the host device and one or more remote devices are disclosed. The host device is configured to couple to each of the one or more remote devices through one or more corresponding dedicated lanes. Buffer access is allocated by determining, for each of one or more remote devices coupled to the host device, a number of dedicated lanes between the host device and each of the one or more remote devices and allocating access to the buffer of the host device for each of the one or more remote devices responsive to the determined number of dedicated lanes.

Claims (27)

1. An apparatus for use in a host device to buffer data transferred between a controller of the host device and one or more remote devices, the host device being configured to couple to each of the one or more remote devices through one or more corresponding dedicated lanes, the apparatus comprising:

a buffer that buffers data transferred between one or more remote devices and the controller of the host device when the one or more remote devices are coupled to the host device, wherein each of the one or more remote devices couple to the host device through a corresponding link including one or more dedicated lanes;

a buffer controller coupled to the buffer, the buffer controller configured to allocate access to the buffer by the data transferred between the one or more remote devices and the controller of the host device based on a number of dedicated lanes in each link corresponding to each of the one or more remote devices;

a plurality of link cores coupled to the buffer controller, the data transferred between the controller of the host device and each of the one or more remote devices when coupled to the host device passing through an associated one of the plurality of link cores; and

a plurality of link trainers, each of the plurality of link trainers corresponding to one of the link cores, the link trainers configured to negotiate with the one or more remote devices when coupled to the host device to determine the number of dedicated lanes in each link corresponding to the one or more remote devices.

2. The apparatus of claim 1 , wherein the buffer is a receive buffer comprising an address port and a data port and wherein the buffer controller comprises:

a plurality of pipeline registers, each of the plurality of pipeline registers corresponding to one of the plurality of link cores, the plurality of pipeline registers configured to store data from the link cores;

a receive data multiplexer coupled between the plurality of pipeline registers and the receive buffer, the receive data multiplexer selectively passing data from the pipeline registers responsive to data selection signals; and

a buffer access controller coupled to the plurality of pipeline registers, the receive data multiplexer, and the plurality of link cores, the buffer access controller generating the data selection signals based on the number of dedicated lanes in each link corresponding to each of the one or more remote devices.

3. The apparatus of claim 2 , wherein the buffer controller further comprises:

a plurality of address pointers, each of the plurality of address pointers corresponding to one of the plurality of link cores; and

a receive address multiplexer coupled between the plurality of address pointers and the receive buffer, the receive address multiplexer selectively passing addresses from the plurality of address pointers responsive the address selection signals; wherein the buffer access controller is further coupled to the plurality of address pointers and the receive address multiplexer and is further configured to generate the address selection signals based on the number of dedicated lanes In each link corresponding to each of the one or more remote devices.

4. The apparatus of claim 1 , wherein the buffer is a transmit buffer comprising an address port and a data port and wherein the buffer controller comprises:

a plurality of pipeline registers, each of the plurality of pipeline registers corresponding to one of the plurality of link cores, the plurality of pipeline registers configured to store data from the transmit buffer; and

a buffer access controller coupled to the plurality of pipeline registers and the plurality of link cores, the buffer access controller generating load signals for loading data Into the plurality of pipeline registers based on the number of dedicated lanes in each link corresponding to each of the one or more remote devices.

5. The apparatus of claim 4 , wherein the buffer controller further comprises:

a plurality of address pointers, each of the plurality of address pointers corresponding to one of the plurality of link cores; and

a transmit address multiplexer coupled between the plurality of address pointers and the transmit buffer, the transmit address multiplexer selectively passing addresses from the plurality of address pointers responsive to address selection signals; wherein the buffer access controller is further coupled to the plurality of address pointers and the transmit address multiplexer and is further configured to generate the address selection signals based on the number of dedicated lanes in the links corresponding to each of the one or more remote devices.

6. In a computer architecture comprising a host device to buffer data transferred between a controller of the host device and one or more remote devices, wherein the host device is configured to couple to each of the one or more remote devices through one or more corresponding dedicated lanes, the computer architecture implementing a method comprising the steps of:

buffering data transferred between one or more remote devices and the controller of the host device when the one or more remote devices are coupled to the host device, wherein each of the one or more remote devices couple to the host device through a corresponding link including one or more dedicated lanes;

controlling the buffering so as to allocate access to the data transferred between the one or more remote devices and the controller of the host device based on a number of dedicated lanes in each link corresponding to each of the one or more remote devices;

transferring, via a plurality of link cores, the data transferred between the controller of the host device and each of the one or more remote devices; and

negotiating with the one or more remote devices coupled to the host device, via a plurality of link trainers wherein each link trainer corresponds to one of the link cores, to determine the number of dedicated lanes in each link corresponding to the one or more remote devices.

7. The method of claim 6 , further comprising the steps of:

configuring a plurality of pipeline registers to store data received from the link cores, wherein each of the plurality of pipeline registers corresponds to one of the plurality of link cores;

selectively passing data from the pipeline registers for buffering in response to data selection signals; and

controlling the buffering of the passed data based upon the number of dedicated lanes in each link corresponding to each of the one or more remote devices.

Assignments (13)
AMENDED AND RESTATED PATENT SECURITY AGREEMENT Recorded Jun 27, 2025
From: UNISYS CORPORATION; UNISYS HOLDING CORPORATION; UNISYS NPL, INC.; UNISYS AP INVESTMENT COMPANY I
To: COMPUTERSHARE TRUST COMPANY, N.A., AS COLLATERAL TRUSTEE
Reel/Frame 071759/0527 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2020
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: UNISYS CORPORATION
Reel/Frame 054231/0496 →
RELEASE OF SECURITY INTEREST Recorded Nov 9, 2017
From: WELLS FARGO BANK, NATIONAL ASSOCIATION (SUCCESSOR TO GENERAL ELECTRIC CAPITAL CORPORATION)
To: UNISYS CORPORATION
Reel/Frame 044416/0358 →
SECURITY INTEREST Recorded Oct 6, 2017
From: UNISYS CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 044144/0081 →
PATENT SECURITY AGREEMENT Recorded Apr 27, 2017
From: UNISYS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 042354/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 26, 2013
From: DEUTSCHE BANK TRUST COMPANY AMERICAS, AS COLLATERAL TRUSTEE
To: UNISYS CORPORATION
Reel/Frame 030082/0545 →
RELEASE OF SECURITY INTEREST Recorded Mar 15, 2013
From: DEUTSCHE BANK TRUST COMPANY
To: UNISYS CORPORATION
Reel/Frame 030004/0619 →
SECURITY AGREEMENT Recorded Jun 27, 2011
From: UNISYS CORPORATION
To: GENERAL ELECTRIC CAPITAL CORPORATION, AS AGENT
Reel/Frame 026509/0001 →
LIEN Recorded May 7, 2010
From: UNISYS CORPORATION
To: DEUTSCHE BANK NATIONAL TRUST COMPANY
Reel/Frame 024351/0405 →
RELEASE BY SECURED PARTY Recorded Sep 14, 2009
From: CITIBANK, N.A.
To: UNISYS CORPORATION; UNISYS HOLDING CORPORATION
Reel/Frame 023263/0631 →
RELEASE BY SECURED PARTY Recorded Jul 31, 2009
From: CITIBANK, N.A.
To: UNISYS CORPORATION; UNISYS HOLDING CORPORATION
Reel/Frame 023312/0044 →
SECURITY AGREEMENT Recorded Jun 20, 2006
From: UNISYS CORPORATION; UNISYS HOLDING CORPORATION
To: CITIBANK, N.A.
Reel/Frame 018003/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2004
From: CAVANAGH, EDWARD T., JR.; OLDHAM, WILLIAM
To: UNISYS CORPORATION
Reel/Frame 015626/0128 →