IP Library Granted Patent US 7,436,375
Granted Patent B2
US 7,436,375 · App. 10/999,060 · Granted Oct 14, 2008

Method for driving plasma display panel

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Quick Facts
Patent No.
US 7,436,375
App. No.
10/999,060
Granted
Oct 14, 2008
Kind
B2
Abstract

An address pulse width is reduced, so that a display period for driving a plasma display panel (PDP) can be made longer. The PDP comprises cells, each cell having parallel first and second electrodes covered with dielectric and a third electrode disposed in a direction crossing the first and second electrodes. A method of driving the PDP comprises addressing ones of the cells to be illuminated for displaying. The addressing comprises effecting an operation of producing wall charges having the same polarity on the dielectric layers over the first and second electrodes before an operation of producing discharge between the second and third electrodes for addressing, so that the discharge for addressing occurs only between the second and third electrodes.

Claims (9)

1. A method of driving a plasma display panel comprising plural cells, each cell having parallel first and second electrodes covered with a dielectric layer and a third electrode disposed in a direction crossing the first and second electrodes, wherein a period for driving the plasma display panel is divided into a reset period for equalizing wall voltages in the cells, an address period for designating each cell, to be illuminated, in accordance with display data of the plural cells and a sustain period for illuminating the designated cells, to be illuminated, the method comprising:

effecting, during the reset period, a first voltage applying operation in which a first rectangular waveform voltage, having one of a positive or a negative polarity, is applied to the respective first and second electrodes of the plural cells so as to produce a discharge solely between the first and third electrodes of each cell that was illuminated in a sustain period immediately before the reset period, and a second rectangular waveform voltage, having an opposite polarity to that of the first rectangular waveform voltage, is applied to the third electrode of the cells, the first rectangular waveform voltage and the second rectangular waveform voltage being applied at a substantially common time and subsequently,

effecting during the reset period, a second voltage applying operation in which ramping waveform voltages having the same polarity are applied to both the first and second electrodes of the cells at the same time so as to produce a discharge between the first and third electrodes of the cells and between the second and third electrodes of the cells, thereby to produce a discharge, during the address period, solely between the second and third electrodes of the cell to be illuminated, of the plural cells.

2. The method of driving a plasma display panel according to claim 1 , wherein

each of the ramping waveform voltages applied in the second voltage applying operation comprises a first pulse that changes in a positive direction and a second pulse that changes in a negative direction.

3. The method of driving a plasma display panel according to claim 1 , further comprising:

effecting, during the address period, a third voltage applying operation in which ramping waveform pulses are applied to the first and second electrodes of the cells at one time after addressing the cell to be illuminated.

4. The method of driving a plasma display panel according to claim 3 , further comprising:

effecting, before the sustain period following the third voltage applying operation, a fourth voltage applying operation in which a pulse, having a peak value equal to that of a sustain pulse and having a larger pulse width than that of the sustain pulse, is applied to the first and second electrodes of the cells, thereby producing discharges in the cells designated to be illuminated.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2018
From: HITACHI MAXELL, LTD.
To: MAXELL, LTD.
Reel/Frame 045142/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2014
From: HITACHI CONSUMER ELECTRONICS CO., LTD.; HITACHI CONSUMER ELECTRONICS CO, LTD.
To: HITACHI MAXELL, LTD.
Reel/Frame 033694/0745 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2013
From: HITACHI PLASMA PATENT LICENSING CO., LTD.
To: HITACHI CONSUMER ELECTRONICS CO., LTD.
Reel/Frame 030074/0077 →
TRUST AGREEMENT REGARDING PATENT RIGHTS, ETC. DATED JULY 27, 2005 AND MEMORANDUM OF UNDERSTANDING REGARDING TRUST DATED MARCH 28, 2007 Recorded Apr 13, 2007
From: HITACHI LTD.
To: HITACHI PLASMA PATENT LICENSING CO., LTD.
Reel/Frame 019147/0847 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2005
From: FUJITSU LIMITED
To: HITACHI, LTD.
Reel/Frame 017105/0910 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2004
From: HIRAKAWA, HITOSHI; ISHIMOTO, MANABU; AWAMOTO, KENJI
To: FUJITSU LIMITED
Reel/Frame 016042/0457 →