IP Library Granted Patent US 8,013,761
Granted Patent B2
US 8,013,761 · App. 11/011,966 · Granted Sep 6, 2011

Switching matrix for an input device

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Quick Facts
Patent No.
US 8,013,761
App. No.
11/011,966
Granted
Sep 6, 2011
Kind
B2
Abstract

The invention relates to a switching matrix for an input device such as a keyboard or a cursor device for the detection of different switching states. According to the invention the switching matrix has a group electrically connected to a microcontroller, with a plurality of N input and output lines (I/O-lines) with a serially connected terminating resistor to mass each and a group with a plurality of K switching lines with one switching element each. Each switching line connects two of the N I/O lines to each other. The K switching line have an additional series resistor each. According to an interrogation pattern, a first I/O-line as output line is configured with a high potential, a second I/O-line is configured as input line and each further I/O-line as output line is configured with a low potential of the microcontroller.

Claims (13)

1. A switching matrix for an input device, particularly a keyboard or a cursor device, for the detection of switching states of one, two or several synchronously actuated switching element(s), comprising a group electrically connected to a microcontroller with a plurality of N input and output lines (I/O-lines) with a serially connected terminating resistor to ground each and a group with a plurality of K switching lines with one switching element each, whereby each switching line connects two of the N I/O-lines to each other, wherein the K switching lines have an additional series resistor each and according to an interrogation pattern, a first I/O-line as output line is configured with a high potential, a second I/O-line is configured as input line and each further I/O-line as output line is configured with a low potential of the microcontroller.

2. The switching matrix for an input device of claim 1 characterized in that for the detection of a switching state two interrogation patterns are provided, whereby two I/O-lines connected to the switching line of the actuated switching element are alternatively configured as output line with a high potential or as input line and the I/O-lines not connected to the switching line of the switching element to be checked are configured as output line with a low potential of the microcontroller.

3. The switching matrix for an input device of claim 1 wherein the number N of the I/O-lines ( 5 . 1 to 5 .N) is at least 3.

4. The switching matrix for an input device of claim 1 wherein the maximum number K of switching lines with the N switching elements; which are coupled with the number N I/O-lines corresponds to the equation K=(N/2)*(N−1).

5. The switching matrix for an input device of claim 1 wherein the amounts of the terminating resistors of the N I/O-lines are significantly greater than the amounts of the series resistors of the K switching lines.

6. A process for the detection of switching states of one, two or more synchronously actuated switching elements of an input device, using a group electrically connected to a microcontroller, with a plurality of N input and output lines with a serially connected terminating resistor to ground each, and a group with a plurality of K switching lines with a switching element and a series resistor each, whereby each switching line connects two of the N I/O-lines to each other, the process comprising the following process steps:

providing a bit for each of the N switching elements and setting the key status bit to 0 for each of the N switching elements;

setting all output registers to 0;

setting all direction registers to output;

passing through an external loop, whereby the number of loop passes corresponds to the number of N I/O-lines;

passing through an internal loop, whereby the number of loop passes corresponds to the number of N switching elements and two interrogation patterns per switching elements are interrogated in each case;

evaluating the input signals and detection of the switching signals by an OR relation of the key status bit to the new input signal; and

checking whether there is a permissible key combination.

Assignments (12)
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Jun 9, 2014
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDINGS, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
Reel/Frame 033107/0717 →
SECURITY INTEREST Recorded Apr 18, 2014
From: VISTEON CORPORATION, AS GRANTOR; VISTEON GLOBAL TECHNOLOGIES, INC., AS GRANTOR
To: CITIBANK., N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 032713/0065 →
RELEASE BY SECURED PARTY AGAINST SECURITY INTEREST IN PATENTS ON REEL 025241 FRAME 0317 Recorded Apr 26, 2011
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDING, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
Reel/Frame 026178/0412 →
SECURITY AGREEMENT Recorded Oct 19, 2010
From: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDING, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
Reel/Frame 025241/0317 →
SECURITY AGREEMENT (REVOLVER) Recorded Oct 19, 2010
From: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDINGS, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
Reel/Frame 025238/0298 →
RELEASE BY SECURED PARTY AGAINST SECURITY INTEREST IN PATENTS RECORDED AT REEL 022575 FRAME 0186 Recorded Oct 7, 2010
From: WILMINGTON TRUST FSB, AS ADMINISTRATIVE AGENT
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 025105/0201 →
RELEASE BY SECURED PARTY AGAINST SECURITY INTEREST IN PATENTS RECORDED AT REEL 022974 FRAME 0057 Recorded Oct 6, 2010
From: THE BANK OF NEW YORK MELLON
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 025095/0711 →
ASSIGNMENT OF PATENT SECURITY INTEREST Recorded Jul 17, 2009
From: JPMORGAN CHASE BANK, N.A., A NATIONAL BANKING ASSOCIATION
To: THE BANK OF NEW YORK MELLON, AS ADMINISTRATIVE AGENT
Reel/Frame 022974/0057 →
ASSIGNMENT OF SECURITY INTEREST IN PATENTS Recorded Apr 21, 2009
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: WILMINGTON TRUST FSB, AS ADMINISTRATIVE AGENT
Reel/Frame 022575/0186 →
SECURITY INTEREST Recorded Feb 27, 2009
From: VISTEON GLOBAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK
Reel/Frame 022368/0001 →
SECURITY AGREEMENT Recorded Feb 7, 2008
From: VISTEON GLOBAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 020497/0733 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2005
From: MAYER, WALTER
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 015884/0253 →