IP Library Granted Patent US 7,391,512
Granted Patent B2
US 7,391,512 · App. 11/017,748 · Granted Jun 24, 2008

Integrated optoelectronic system for measuring fluorescence or luminescence emission decay

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Quick Facts
Patent No.
US 7,391,512
App. No.
11/017,748
Granted
Jun 24, 2008
Kind
B2
Abstract

An optoelectronic system for measuring fluorescence or luminescence emission decay, including (a) a light source being a light emitting diode, a semiconductor laser or a flash tube; (b) a first integrated circuit comprising at least one circuit causing the light source to emit light pulses towards a sample which causes a fluorescence or luminescence emission from the sample; (c) a photodiode detecting the emission; (d) a second integrated circuit comprising a detection analysis system determining information about the sample by analyzing decay of the detected emission; and (e) an enclosure enclosing the light source, the first integrated circuit, the second integrated circuit and the photodiode.

Claims (63)

1. An apparatus comprising:

a light source being a light emitting diode, a semiconductor laser or a flash tube;

an integrated circuit operable to cause the light source to emit light pulses;

a first lens directing the light pulses from the light source towards a sample, which causes a fluorescence or luminescence emission from the sample, the first lens being positioned between the light source and the sample such that the first lens is adjacent to the sample;

a detector detecting the emission;

a second lens directing the emission from the sample towards the detector, the second lens being positioned between the sample and the detector such that the second lens is adjacent to the sample;

a detection analysis system determining information about the sample by analyzing decay of the detected emission; and

an enclosure enclosing the light source, the integrated circuit, the first lens, the detector, the second lens, and the detection analysis system.

2. An apparatus as in claim 1 , further comprising:

a substrate on which the integrated circuit and the detection analysis system are mounted.

3. An apparatus as in claim 1 , further comprising:

a substrate on which the integrated circuit, the light source and the detection analysis system are mounted.

4. An apparatus as in claim 1 , wherein the integrated circuit comprises:

a clock circuit producing a clock signal; and

a light source drive circuit driving the light source in accordance with the clock signal to emit the light pulses towards the sample.

5. An apparatus as in claim 1 , wherein the integrated circuit comprises:

a clock circuit producing a clock signal;

a light source drive circuit driving the light source in accordance with the clock signal to emit the light pulses towards the sample; and

a variable delay circuit producing a variable delay used by the detection analysis system to detect the emission.

6. An apparatus as in claim 1 , wherein the detection analysis system comprises:

a detection analysis system integrated circuit comprising a gated integrator generating an electrical signal; and

a signal processor processing the electrical signal, to thereby determine the information about the sample.

7. An apparatus as in claim 6 , wherein the signal processor is on the detection analysis system integrated circuit.

8. An apparatus as in claim 6 , wherein the detector is a photodiode.

9. An apparatus as in claim 1 , wherein the detector is a photodiode.

10. An apparatus as in claim 6 , further comprising:

a substrate on which the integrated circuit and the detection analysis system integrated circuit are mounted.

11. An apparatus as in claim 1 , wherein the detection analysis system comprises:

a detection analysis system integrated circuit comprising a time-to-pulse-height converter;

a multi-channel analyzer; and

a signal processor, wherein the time-to-pulse-height converter, the multi-channel analyzer and the signal processor operate together to determine the information about the sample from the detected emission.

12. An apparatus as in claim 11 wherein the multi-channel analyzer is on the detection analysis system integrated circuit.

13. An apparatus as in claim 11 , wherein the multi-channel analyzer and the signal processor are on the detection analysis system integrated circuit.

14. An apparatus as in claim 2 , further comprising:

a display device displaying the information, wherein the display device is on the substrate and enclosed by the enclosure.

15. The apparatus of claim 1 , further comprising a monochromator between the second lens and the detector.

16. An apparatus comprising:

a light source being a light emitting diode, a semiconductor laser or a flash tube;

an integrated circuit operable to cause the light source to emit light pluses;

a first lens directing the light pulses from the light source towards a sample, which causes a fluorescence or luminescence emission from the sample, the first lens being positioned between the light source and the sample such that the first lens is adjacent to the light source and the sample;

a photodiode detecting the emission;

a second lens directing the emission from the sample towards the photodiode, the second lens being positioned between the sample and the photodiode such that the second lens is adjacent to the sample and the photodiode;

a detection analysis system determining information about the sample by analyzing decay of the detected emission; and

an enclosure enclosing the light source; the integrated circuit, the first lens, the photodiode, the second lens, and the detection analysis system.

17. An apparatus as in claim 16 , further comprising:

a substrate on which the integrated circuit and the detection analysis system are mounted.

18. An apparatus as in claim 16 , further comprising:

a substrate on which the integrated circuit, the light source and the detection analysis system are mounted.

19. An apparatus as in claim 16 , wherein the integrated circuit comprises:

a clock circuit producing a clock signal; and

a light source drive circuit driving the light source in accordance with the clock signal to emit the light pulses towards the sample.

20. An apparatus as in claim 16 , wherein the integrated circuit comprises:

a clock circuit producing a clock signal;

a light source drive circuit driving the light source in accordance with the clock signal to emit the light pulses towards the sample; and

a variable delay circuit producing a variable delay used by the detection analysis system to detect the emission.

21. An apparatus comprising:

a light source being a light emitting diode, a semiconductor laser or a flash tube;

a first integrated circuit operable to cause the light source to emit light pulses;

a first lens directing the light pulses from the light source towards a sample, which causes a fluorescence or luminescence emission from the sample, the first lens being positioned between the light source and the sample such that the first lens is adjacent to the light source and the sample;

a photodiode detecting the emission;

a second lens directing the emission from the sample towards the photodiode, the second lens being positioned between the sample and the photodiode such that the second lens is adjacent to the sample and the photodiode;

a second integrated circuit comprising a detection analysis system determining information about the sample by analyzing decay of the detected emission; and

an enclosure enclosing the light source, the first integrated circuit, the first lens, the photodiode, the second lens, and the second integrated circuit.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 017206 FRAME: 0666. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038632/0662 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2008
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: ALVERIX, INC.
Reel/Frame 020948/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017206/0666 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2005
From: FOUQUET, JULIE E.; HARDCASTLE, IAN; HELBING, RENE; GROT, ANNETTE C.; PETRILLA, JOHN
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 015844/0493 →