IP Library Granted Patent US 7,440,499
Granted Patent B2
US 7,440,499 · App. 11/042,571 · Granted Oct 21, 2008

Fractional spaced equalizer

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Quick Facts
Patent No.
US 7,440,499
App. No.
11/042,571
Granted
Oct 21, 2008
Kind
B2
Abstract

Fractional Spaced Equalizer FSEQ having adjustable coefficients ci for equalizing a reception signal of a transceiver. The transceiver comprises an echo compensator EC which generates an echo compensation signal for compensating an echo signal of the transceiver. The echo compensation signal is subtracted from the reception signal equalized by the fractional spaced equalizer FSEQ by means of a subtractor and the adjustable coefficients ci of the fractional spaced equalizer FSEQ are set after a half-duplex training phase of the transceiver during which the echo compensator EC is deactivated.

Claims (55)

1. Fractional Spaced Equalizer having adjustable coefficients for equalizing a reception signal of a transceiver,

(a) wherein said transceiver comprises an echo compensator which generates an echo compensation signal for compensating an echo signal of said transceiver,

(b) wherein said echo compensation signal is substracted from said reception signal equalized by said fractional spaced equalizer by means of a substractor, and

(c) wherein the adjustable coefficients of said fractional spaced equalizer are set after a half-duplex training phase of said transceiver during which said echo compensator is deactivated.

2. The Fractional Spaced Equalizer according to claim 1 , wherein an output of said substractor is connected to a linear equalizer having adjustable coefficients for further equalizing the reception signal of said transceiver.

3. The Fractional Spaced Equalizer according to claim 2 , wherein said linear equalizer is switchable between a T-Mode wherein the linear equalizer operates at a symbol frequency and a

T

2

-

Mode

wherein the linear equalizer operates at twice the symbol frequency.

4. The Fractional Spaced Equalizer according to claim 3 , wherein the coefficients of said linear equalizer are adjusted after the linear equalizer has been switched to the

T

2

-

Mode

during said half-duplex training of said transceiver while said echo compensator and said fractional spaced equalizer are deactivated.

5. The Fractional Spaced Equalizer according to claim 4 , wherein the adjusted coefficients of said linear equalizer are copied by means of an interface to said fractional spaced equalizer to set the adjustable coefficients of said fractional spaced equalizer.

6. The Fractional Spaced Equalizer according to claim 5 , wherein the linear equalizer is switched back to the T-Mode and the coefficients of said linear equalizer are reset to a start coefficient set after they have been copied by means of said interface to said fractional spaced equalizer.

7. The Fractional Spaced Equalizer according to claim 6 , wherein the coefficients of said linear equalizer are adjusted in said T-Mode during a full-duplex training phase of said transceiver after the echo compensator and the fractional spaced equalizer have been activated.

8. The Fractional Spaced Equalizer according to claim 1 , wherein the activated fractional spaced equalizer operates at twice the symbol frequency as a

T

2

-

equalizer

.

9. The Fractional Spaced Equalizer according to claim 7 , wherein the transceiver transmits and receives data in a data transmission phase via a data transmission channel after the coefficients of said linear equalizer have been adjusted during said full-duplex training phase.

10. The Fractional Spaced Equalizer according to claim 1 , wherein said transceiver is a SHDSL transceiver.

11. The Fractional Spaced Equalizer according to claim 9 , wherein during the data transmission phase the fractional spaced equalizer operates at twice the symbol frequency as a

T

2

-

equalizer

and the linear equalizer operates at a symbol frequency as a T-equalizer in said T-Mode.

12. The Fractional Spaced Equalizer according to claim 1 , wherein the fractional spaced equalizer comprises decimation means for performing a frequency decimation.

13. The Fractional Spaced Equalizer according to claim 1 , wherein the fractional spaced equalizer receives interpolated data symbols from an interpolation unit which interpolates data samples generated by an analog-digital converter operating at a predetermined oversampling frequency.

14. The Fractional Spaced Equalizer according to claim 13 , wherein the sampling phase of said interpolation unit is regulated by a clock recovery unit to synchronize the sampling frequency to a transmitter symbol frequency.

15. The Fractional Spaced Equalizer according to claim 2 , wherein the linear equalizer is connected to a decision unit of said transceiver which generates reception data depending on the equalized reception signal output by said linear equalizer.

16. The Fractional Spaced Equalizer according to claim 15 , wherein the decision unit is connected to a decision feedback equalizer operating at symbol frequency as a T-equalizer.

17. The Fractional Spaced Equalizer according to claim 15 , wherein the decision unit is connected to a timing error detection unit which generates a phase control criterium supplied to said clock recovery unit.

18. Method for setting coefficients of a fractional spaced equalizer provided within a transceiver for equalizing a reception signal said method comprising the following steps:

(a) switching a linear equalizer of said transceiver to a

T

2

-

Mode

so that the linear equalizer operates at twice a symbol frequency

(b) deactivating an echo compensator of said transceiver and deactivating said fractional spaced equalizer;

(c) adjusting coefficients of said linear equalizer in said

T

2

-

Mode

during a half-duplex training phase while said echo compensator and said fractional spaced equalizer are deactivated; and

(d) copying the adjusted coefficients of said linear equalizer via an interface to said fractional spaced equalizer to set the coefficients of said fractional spaced equalizer.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2017
From: QUARTERHILL INC.
To: WI-LAN INC.
Reel/Frame 043167/0149 →
MERGER AND CHANGE OF NAME Recorded Jun 20, 2017
From: WI-LAN INC.; QUARTERHILL INC.
To: QUARTERHILL INC.
Reel/Frame 042902/0973 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2009
From: INFINEON TECHNOLOGIES AG
To: WI-LAN INC.
Reel/Frame 022951/0022 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2009
From: SCHENK, HEINRICH
To: INFINEON TECHNOLOGIES AG
Reel/Frame 022694/0564 →