Thin wafer detectors with improved radiation damage and crosstalk characteristics
View Patent ↗The present invention is directed toward a detector structure, detector arrays, and a method of detecting incident radiation. The present invention comprises several embodiments that provide for reduced radiation damage susceptibility, decreased affects of crosstalk, reduced dark current (current leakage) and increased flexibility in application. In one embodiment, a photodiode array comprises a substrate having at least a front side and a back side, a plurality of diode elements integrally formed in the substrate forming the array, wherein each diode element has a p+ fishbone pattern on the front side, and wherein the p+ fishbone pattern substantially reduces capacitance and crosstalk between adjacent photodiodes, a plurality of front surface cathode and anode contacts, and wire interconnects between diode elements made through a plurality of back surface contacts.
1. A photodiode array comprising:
a substrate having at least a front side and a back side;
a plurality of diode elements, each having a plurality of edges, integrally formed in the substrate forming said array, wherein each of said plurality of diode elements has a center and comprises:
a p+ fishbone pattern on said front side, comprised of a plurality of ribs, wherein each of said ribs comprises a p+ diffused layer and has at least one end, and wherein a contiguous interconnect, comprising a p+ diffused layer and distinct from each of said ribs, encircles each of said ribs and is in direct contact with each at least one end of each of said ribs; an n+ region substantially conformally surrounding the contiguous interconnect; and
an anode pad in the center of each of said plurality of diode elements.
2. The array of claim 1 wherein a gap between each of said plurality of ribs of said fishbone pattern is in the range of 10 μm to 180 μm.
3. The array of claim 1 wherein a gap between the contiguous interconnect and a cathode pad is in the range of 25 to 75 μm.
4. The array of claim 1 , wherein said substrate is made of n doped silicon.
5. The array of claim 4 , wherein said substrate has a thickness ranging from 0.075 mm to 0.275 mm.