IP Library Granted Patent US 7,495,179
Granted Patent B2
US 7,495,179 · App. 11/166,982 · Granted Feb 24, 2009

Components with posts and pads

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Quick Facts
Patent No.
US 7,495,179
App. No.
11/166,982
Granted
Feb 24, 2009
Kind
B2
Abstract

A packaged microelectronic element includes connection component incorporating a dielectric layer ( 22 ) carrying traces ( 58 ) remote from an outer surface ( 26 ), posts ( 48 ) extending from the traces and projecting beyond the outer surface of the dielectric, and pads ( 30 ) exposed at the outer surface of the dielectric layer, the pads being connected to the posts by the traces. The dielectric element overlies the front surface of a microelectronic element, and contacts ( 74 ) exposed on the front surface of the microelectronic element are connected to the pads by elongated leads ( 76 ) such as wire bonds. Methods of making the connection component are also disclosed.

Claims (31)

1. A connection component for mounting a microelectronic element, said connection component comprising:

(a) a dielectric layer having an upwardly-facing inner surface and a downwardly-facing outer surface;

(b) electrically conductive traces extending on said dielectric layer remote from said outer surface;

(c) electrically conductive posts extending from said traces through said dielectric layer and projecting downwardly beyond said outer surface of said dielectric layer; and

(d) electrically conductive pads exposed at said outer surface of said dielectric layer, at least some of said pads being electrically connected to at least some of said posts by at least some of said traces wherein said pads define exposed pad surfaces recessed upwardly from said outer surface.

2. The component as claimed in claim 1 wherein said pads project downwardly from said traces at least partially through said dielectric layer.

3. The component as claimed in claim 1 wherein said pads define downwardly facing pad surfaces substantially flush with said outer surface of said dielectric layer.

4. The component as claimed in claim 1 wherein said posts are adapted for solder-bonding to a circuit panel.

5. A component as claimed in claim 1 wherein said traces extend on said inner surface of said dielectric layer.

6. A component as claimed in claim 1 wherein said pads have downwardly facing exposed surfaces, said pads including a first metal and a layer of a second metal covering said surfaces.

7. A component as claimed in claim 1 wherein said pads have downwardly facing exposed surfaces, said surfaces of said pads being substantially flat.

8. A connection component for mounting a microelectronic element, said connection component comprising:

(a) a dielectric layer having an upwardly-facing inner surface and a downwardly-facing outer surface;

(b) electrically conductive traces extending on said dielectric layer remote from said outer surface;

(c) electrically conductive posts extending from said traces through said dielectric layer and projecting downwardly beyond said outer surface of said dielectric layer wherein said posts include upper portions extending downwardly from said traces and lower portions projecting downwardly from said upper portions, said upper portions defining end surfaces having horizontal dimensions, said lower portions defining base surfaces contiguous with said end surfaces of said upper portions, said base surfaces of said posts having horizontal dimensions greater than the horizontal dimensions of said end surfaces; and

(d) electrically conductive pads exposed at said outer surface of said dielectric layer, at least some of said pads being electrically connected to at least some of said posts by at least some of said traces.

9. The component as claimed in claim 8 wherein said end surfaces of said upper portions are substantially flush with said outer surface of said dielectric element.

10. A connection component for mounting a microelectronic element, said connection component comprising:

(a) a dielectric layer having an upwardly-facing inner surface and a downwardly-facing outer surface;

(b) electrically conductive traces extending on said dielectric layer remote from said outer surface;

(c) electrically conductive posts extending from said traces through said dielectric layer and projecting downwardly beyond said outer surface of said dielectric layer; and

(d) electrically conductive pads exposed at said outer surface of said dielectric layer, at least some of said pads being electrically connected to at least some of said posts by at least some of said traces, wherein said dielectric layer has a plurality of edges and edge regions adjacent said edges, at least some of said pads being exposed at a first one of said edge regions adjacent a first one of said edges; and

a microelectronic element having a front face, said dielectric layer overlying a portion of said front face with said inner surface of said dielectric layer facing upwardly toward said front face, a first contact region of said front face projecting outwardly beyond said first edge of said dielectric layer, said microelectronic element having contacts exposed at said front face in said first contact region, the packaged element further including elongated leads extending between at least some of said contacts and at least some of said pads.

11. A packaged microelectronic element as claimed in claim 10 wherein said dielectric layer has a second edge opposite from said first edge and a second edge region adjacent said second edge, and wherein said front face of said microelectronic element includes a second contact region projecting outwardly beyond said second edge, said pads including second-edge pads exposed at said second edge region, said microelectronic element having second-region contacts exposed at said front surface in said second contact region, the packaged microelectronic element further comprising elongated second-edge leads extending from at least some of said second-region contacts to at least some of said second-edge pads.

12. A connection component for mounting a microelectronic element, said connection component comprising:

(a) a dielectric layer having an upwardly-facing inner surface and a downwardly-facing outer surface;

(b) electrically conductive traces extending on said dielectric layer remote from said outer surface;

(c) electrically conductive posts extending from said traces through said dielectric layer and projecting downwardly beyond said outer surface of said dielectric layer; and

(d) electrically conductive pads exposed at said outer surface of said dielectric layer, at least some of said pads being electrically connected to at least some of said posts by at least some of said traces, wherein said dielectric layer has an elongated slot extending through it, said dielectric layer defining a pair of slot edge regions on opposite sides of said slot, said pads including slot-edge pads exposed at least one of said slot edge regions.

13. A packaged microelectronic element comprising a component as claimed in claim 12 and a microelectronic element having a front face, said dielectric layer overlying a portion of said front face with said inner surface of said dielectric layer facing upwardly toward said front face, said microelectronic element having contacts exposed at said front face and aligned with said slot, the packaged microelectronic element further comprising elongated slot leads extending through said slot from at least some of said contacts to at least some of said slot-edge pads.

14. A packaged microelectronic element as claimed in claim 10 or claim 11 or claim 13 wherein said elongated leads are wire bonds.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2005
From: KUBOTA, YOICHI; KANG, TECK-GYU; PARK, JAE M.; HABA, BELGACEM
To: TESSERA, INC.
Reel/Frame 016640/0766 →