IP Library Granted Patent US 7,626,648
Granted Patent B2
US 7,626,648 · App. 11/242,935 · Granted Dec 1, 2009

Pixel circuit substrate, LCD apparatus and projection display apparatus having interlayer insulating film comprising a laminate of inorganic insulating material having a uniformly flat surface over TFT

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Quick Facts
Patent No.
US 7,626,648
App. No.
11/242,935
Granted
Dec 1, 2009
Kind
B2
Abstract

A pixel circuit substrate includes a first interlayer insulating film which is made of an inorganic material at least in a source and drain regions of a thin film transistor. A contact hole is formed in an area above the source and drain regions of a thin film transistor in the first interlayer insulating film. A wiring layer is formed on the first interlayer insulating film, extends to an inner wall and a bottom surface of the contact hole. On a top surface of the wiring layer is formed a recess reflecting the shape of a contact hole. A second interlayer insulating film is formed on the wiring layer, embedded in the recess and has a flat top surface in an area above the thin film transistor. A storage capacitor on the second interlayer insulating film is disposed in the area above the thin film transistor.

Claims (36)

1. A pixel circuit substrate comprising:

a substrate;

a thin film transistor formed on said substrate;

a first interlayer insulating film comprising an inorganic material at least in source and drain regions of said thin film transistor, said first interlayer insulating film having a contact hole formed in an area immediately above said source and drain regions of said thin film transistor;

a wiring layer which arranged on said first interlayer insulating film, extending to an inner wall and a bottom surface of said contact hole, the wiring layer being connected to said source and drain regions, a top surface of the wiring layer having a recess reflecting a shape of said contact hole;

a second interlayer insulating film comprising a laminate of inorganic material, formed on said wiring layer and embedded in said recess, the second interlayer insulating film being a laminate to have a uniformly flat top surface in an area immediately above said thin film transistor including said source and drain regions; and

a storage capacitor on said second interlayer insulating film disposed in said area immediately above said thin film transistor.

2. A liquid crystal display apparatus comprising:

the pixel circuit substrate according to claim 1 ;

a counter substrate;

a liquid crystal layer disposed between said pixel circuit substrate and said counter substrate.

3. The liquid crystal display apparatus according to claim 2 , wherein said second interlayer insulating film comprises a silicon oxide film.

4. The liquid crystal display apparatus according to claim 3 , wherein said silicon oxide film is formed by an O 3 -alkoxysilane reaction by a normal pressure CVD method.

5. The liquid crystal display apparatus according to claim 4 , wherein said silicon oxide film is formed under a condition in which the 0 3 concentration in 0 2 is in a range of 100 to 200 g/m 3 , and said liquid crystal display apparatus further comprises a base film made of a silicon oxide film under said second interlayer insulating film by an 0 3 -alkoxysilane reaction by a normal pressure CVD method in which the 0 3 concentration in O 2 is in a range of 5 to 20 g/m 3 .

6. The liquid crystal display apparatus according to claim 3 , wherein said silicon oxide film is formed by an O 3 -hexamethyldisiloxane reaction by a normal pressure CVD method.

7. The liquid crystal display apparatus according to claim 6 , wherein said silicon oxide film formed under the condition in which the 0 3 concentration in 0 2 is in a range of 100 to 200 g/m 3 , and said liquid crystal display apparatus further comprises a base film made of a silicon oxide film under said second interlayer insulating film by an O 3 -alkoxysilane reaction by a normal pressure CVD method in which the 0 3 concentration in 0 2 is in a range of 5 to 20 g/m 3 .

8. The liquid crystal display apparatus according to claim 2 , wherein a top surface of a portion of said second interlayer insulating film corresponding to said area immediately above said thin film transistor is in a position higher than a top surface of a portion corresponding to said region other than said region immediately above said thin film transistor.

9. The liquid crystal display apparatus according to claim 2 , wherein when the unit area of each pixel is denoted by X and a total value of an effective area of a contact hole in each pixel is denoted by Y, the value of the ratio (Y/X) is equal to or greater than 0.01.

10. The liquid crystal display apparatus according to claim 2 , wherein said pixel circuit substrate and said counter substrate are made of a transparent material and said liquid crystal display apparatus is a transmission type liquid crystal display apparatus.

11. A projection display apparatus, comprising:

a light source; and

said liquid crystal display apparatus according to claim 10 , which is disposed in such a manner as to lie on a path of light emitted from said light source.

12. A pixel circuit substrate, comprising:

a substrate;

a thin film transistor formed on said substrate;

a first interlayer insulating film comprising silicon oxide at least in source and drain regions of said thin film transistor, said first interlayer insulating film having a contact hole formed in an area immediately above said source and drain regions of said thin film transistor;

a wiring layer which arranged on said first interlayer insulating film, extending to an inner wall and a bottom surface of said contact hole, the wiring layer being connected to said source and drain regions, a top surface of the wiring layer having a recess reflecting a shape of said contact hole;

a second interlayer insulating film comprising a laminate of silicon oxide, formed on said wiring layer and embedded in said recess, the second interlayer insulating film being a laminate to have a uniformly flat top surface in an area immediately above said thin film transistor including said source and drain regions; and

a storage capacitor on said second interlayer insulating film disposed in said area immediately above said thin film transistor.

13. The pixel circuit substrate according to claim 12 , wherein said second interlayer insulating film is formed by an O 3 -alkoxysilane reaction by a normal pressure CVD method.

14. The pixel circuit substrate according to claim 13 wherein said second interlayer insulating film is formed under a condition in which an 0 3 concentration in 0 2 is in a range of 100 to 200 g/m 3 , and said liquid crystal display apparatus further comprises a base film made of a silicon oxide film under said second interlayer insulating film by an 0 3 -alkoxysilane reaction by a normal pressure CVD method in which the 0 3 concentration in O 2 is in a range of 5 to 20 g/m 3 .

15. The pixel circuit substrate according to claim 12 , wherein said second interlayer insulating film is formed by an O 3 -hexamethyldisiloxane reaction by a normal pressure CVD method.

16. The pixel circuit substrate according to claim 15 , wherein said second interlayer insulating film is formed under the condition in which the O 3 concentration in 0 2 is in a range of 100 to 200 g/m 3 , and said liquid crystal display apparatus further comprises a base film made of a silicon oxide film under said second interlayer insulating film by an O 3 -alkoxysilane reaction by a normal pressure CVD method in which an 0 3 concentration in 0 2 is in a range of 5 to 20 g/m 3 .

17. The pixel circuit substrate according to claim 12 , wherein a top surface of a portion of said second interlayer insulating film corresponding to said area immediately above said thin film transistor is in a position higher than a top surface of a portion corresponding to said region other than said region immediately above said thin film transistor.

18. The pixel circuit substrate according to claim 12 , wherein when the unit area of each pixel is denoted by X and a total value of an effective area of a contact hole in each pixel is denoted by Y, the value of the ratio (Y/X) is equal to or greater than 0.01.

19. The pixel circuit substrate according to claim 12 , wherein said substrate is made of a transparent material, and said pixel circuit substrate is part of a transmission type liquid crystal display apparatus.

Assignments (4)
SECURITY INTEREST Recorded Jul 14, 2022
From: VISTA PEAK VENTURES, LLC
To: GETNER FOUNDATION LLC
Reel/Frame 060654/0430 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2018
From: GETNER FOUNDATION LLC
To: VISTA PEAK VENTURES, LLC
Reel/Frame 045469/0023 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2011
From: NEC CORPORATION
To: GETNER FOUNDATION LLC
Reel/Frame 026254/0381 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2005
From: SHIOTA, KUNIHIRO; TANABE, HIROSHI
To: NEC CORPORATION
Reel/Frame 017070/0225 →