Calibration wafer for a stepper
There is a method for manufacturing wafers. In an example embodiment, the method employs a stepper with a reticle, lens, and stage movement parameters that comprise providing a set of intentionally-misaligned calibration wafers with predetermined input corrections, the input corrections accounting for linearity of response and interactions between the reticle, lens and stage movement parameters of the stepper. The stepper is calibrated by using the predetermined input corrections from the set of intentionally misaligned calibration wafers. Using the calibrated stepper, aligned patterns on the wafers are printed.
1 - 6 . (canceled)
7 - 8 . (canceled)
9 . A method for manufacturing wafers, the method employing a stepper with reticle, lens and stage movement parameters and comprising the steps of:
providing a set of intentionally-misaligned calibration wafers with predetermined input corrections, the input corrections accounting for linearity of response and interactions between the reticle, lens and stage movement parameters of the stepper;
calibrating the stepper by using the predetermined input corrections from the set of intentionally-misaligned calibration wafers; and
using the calibrated stepper, printing aligned patterns on the wafers.
10 . The method of claim 9 further comprising, regressing effects of the predetermined input corrections on the aligned patterns on the wafer.
11 . The method of claim 10 wherein, the predetermined input corrections comprise at least one of the following: translation error, die magnification, die rotation, wafer magnification, and wafer rotation.
12 . The method of claim 11 wherein, the accounting for linearity of response and interactions between the reticle, lens and stage movement parameters of the stepper is defined by a linear model comprising a system of equations.
13 . The method of claim 12 wherein the system of equations comprises:
R x =R x0 +R xChipMag X chip +R xChipRot X chip +R xWMag X wafer +R yWRot X wafer
R y =R y0 +R yChipMag Y chip +R yChipRot Y chip +R yWMag Y wafer +R xWRot Y wafer
14 . The method of claim 11 wherein the system of equations is solved by the following relationship X result =TX input where
X
result
=
(
R
x0
R
y0
R
ChipMag
R
ChipRot
R
xWMag
R
yWMag
R
xWRot
R
yWRot
)
result
,
X
input
=
(
R
x0
R
y0
R
ChipMag
R
ChipRot
R
xWMag
R
yWMag
R
xWRot
R
yWRot
)
input
;
and T is a matrix that is calculated by
regressing effects of the predetermined input corrections on the aligned patterns on the wafer.
15 . A calibration substrate used in conjunction with a wafer stepper with reticle, lens and stage movement parameters, the calibration substrate comprising:
a first pattern of error-free alignment artifacts on the substrate; and
a second pattern of alignment artifacts having predetermined errors on the substrate.
16 . The calibration substrate of claim 15 wherein, the second pattern of alignment artifacts has a predetermined offset selected to minimize round-off error for a wafer stepper having a defined incremental shift value of the reticle, lens and stage movement parameters.
17 . The calibration substrate of claim 16 wherein, the predetermined errors are selected from at least one of the following: translation error, die magnification, die rotation, wafer magnification, and wafer rotation.