Method for calibrating and de-embedding, set of devices for de-embedding and vector network analyzer
View Patent ↗Consistent with an example embodiment, there is a method for calibrating an N terminal microwave measurement network. The method including the measurement of network parameter values of a load device depends on the knowledge of the parasitic impedance of the load device. According to the example embodiment, the accuracy of the method is improved by at least approximately determining the parasitic impedances of the load device. This may be achieved by measuring network parameter values of an auxiliary open device, having substantially identical parasitic impedance as that of the load device. The accuracy is further increased by measuring network parameter values of an auxiliary short device, having substantially identical parasitic impedance as that of the load device. A similar principle can be used for de-embedding a device under test. A load device, an auxiliary open device and an auxiliary short device each having substantially identical parasitic impedances are disclosed.
1. A method for calibrating a microwave measurement network having N terminals, N being an integer larger than one, the microwave measurement network comprising a vector network analyzer and a plurality of probe tips, the microwave measurement network having a parasitic impedance between the vector network analyzer and the probe tips, the method comprising the steps of:
measuring open network parameter values of an open device having N terminals, which are mutually electrically insulated;
measuring short network parameter values of a short device having N terminals, which are mutually electrically connected by conductors, each conductor having a short device DC resistance;
measuring load network parameter values of a load device having N terminals, which are mutually electrically connected by resistors, each resistor having a load device DC resistance, which is larger than the short device DC resistance, the load device having a parasitic load impedance, and
determining the parasitic impedance between the vector network analyzer and the probe tips, wherein the method further comprises the step of determining the parasitic load impedance prior to the step of determining the parasitic impedance between the vector network analyzer and the probe tips; and
wherein the step of determining the parasitic load impedance comprises the sub-step of measuring auxiliary open network parameter values of an auxiliary open device having N terminals, which are mutually electrically insulated, the auxiliary open device having a parasitic auxiliary open impedance, which is substantially identical to the parasitic load impedance.
2. A method as claimed in claim 1 wherein the step of determining the parasitic load impedance further comprises the sub-step of measuring auxiliary short network parameter values of an auxiliary short device having N terminals, which are mutually electrically connected by conductors, each conductor having an auxiliary short device DC resistance, which is smaller than the load device DC resistance, the auxiliary short device having a parasitic auxiliary short impedance, which is substantially identical to the parasitic load impedance.