IP Library Granted Patent US 7,231,112
Granted Patent B2
US 7,231,112 · App. 11/384,747 · Granted Jun 12, 2007

Solder seals within a switching system

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Quick Facts
Patent No.
US 7,231,112
App. No.
11/384,747
Granted
Jun 12, 2007
Kind
B2
Abstract

A silicon chip is attached to a planar light circuit. A recessed moat is formed around an output perimeter of a surface of the silicon chip. When soldering the silicon chip to the planar light circuit, the recessed moat is filled with solder.

Claims (12)

1. A method for attaching a silicon chip to a planar light circuit comprising the following steps:

(a) forming recessed areas in the planar light circuit; the planar light circuit including optical waveguide having a cladding

(b) forming a solder ring within the recessed areas of the planar light circuit; and,

(c) soldering the silicon chip to the planar light circuit using solder in the solder ring; wherein the solder ring directly bonds the cladding of the optical waveguide to the silicon chip.

2. A method as in claim 1 wherein step (b) includes:

forming a metal ring under the solder ring.

3. A method as in claim 1 wherein step (c) includes:

heating solder with a heating region located on the silicon chip.

4. A method as in claim 1 wherein step (c) includes:

heating the solder with a heating region located on the silicon chip, the heating region being composed of one of the following:

a diffusion well;

a metal resistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD
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