Sealed nitride layer for integrated circuits
View Patent ↗The present invention relates to an integrated circuit. The integrated circuit includes a substrate, at least one device region formed in the substrate, a patterned layer of oxide, a first and second layer of nitride and at least one metal contact region. The patterned layer of oxide is formed over a surface of the substrate, wherein the patterned layer provides at least one opening to the surface of the substrate adjacent the at least one device region. The first layer of nitride is formed over the patterned oxide layer. The second nitride layer is formed along sidewalls to the at least one opening. The patterned oxide layer is sealed with the first and second nitride layers. The at least one metal contact region is formed in the at least one opening.
1. An integrated circuit comprising:
a substrate;
a plurality semiconductor devices formed in the substrate, some of the semiconductor devices having device regions formed adjacent a surface of the substrate;
a layer of oxide overlaying the surface of the substrate;
a first layer of nitride overlaying the layer of oxide, the first layer of nitride and the layer of oxide having a plurality of contact openings extending to select device regions in the substrate; and
portions of a second layer of nitride overlaying sidewalls of each contact opening, wherein the portions of the second layer of nitride overlaying the oxide layer in the sidewalls are thinner than the first layer of nitride overlaying the rest of the layer of oxide.
2. The integrated circuit of claim 1 , wherein at least one of the semiconductor devices is a bipolar transistor.
3. The integrated circuit of claim 2 , wherein the at least one bipolar transistor comprises:
a base region formed in the substrate adjacent the surface of the substrate, the first and second layers of nitride and the oxide layer having a contact opening to the base region;
an emitter formed in the base region, the second layer of nitride having a contact opening to the emitter; and
a collector contact formed in the substrate an predefined distance from the base region, the second layer of nitride having a contact opening to the collector contact.
4. The integrated circuit of claim 3 , wherein the at least one bipolar transistor further comprises:
a metal base contact region formed in the contact opening to the base region;
a metal emitter contact region formed in the contact opening to the emitter; and
a metal collector contact region formed in the contact opening to the collector contact.