IP Library Granted Patent US 7,456,623
Granted Patent B2
US 7,456,623 · App. 11/436,534 · Granted Nov 25, 2008

DC-DC converter and control circuit for DC-DC converter

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,456,623
App. No.
11/436,534
Granted
Nov 25, 2008
Kind
B2
Abstract

A DC-DC converter prevents through current from flowing in an output transistor. A first transistor receives an input voltage. A second transistor is connected to the first transistor. A comparator is connected to the second transistor. The comparator detects current flowing through a choke coil based on the potential difference between two terminals of the second transistor to generate a switching control signal for turning the second transistor on and off. The second transistor and the comparator form an ideal diode. A control circuit of the DC-DC converter generates an activation signal for turning the first transistor on and off based on a pulse signal to keep an output voltage constant. A through current prevention pulse generation circuit generates a pulse signal for turning off the second transistor from before the first transistor is turned on to after the first transistor is turned on.

Claims (41)

1. A DC-DC converter for generating an output voltage from an input voltage, the DC-DC converter comprising:

a first transistor for receiving the input voltage;

a second transistor connected to the first transistor;

a comparator, connected to the second transistor, for detecting current flowing through a choke coil to generate a switching control signal for controlling the second transistor to turn on and off, the choke coil connected to a node between the first transistor and the second transistor;

a control circuit, connected to the first transistor, for controlling the first transistor to turn on and off so as to keep the output voltage constant; and

a pulse generation circuit, connected to the control circuit, for generating a pulse signal for turning off the second transistor during a predetermined period from before the first transistor is turned on to after the first transistor is turned on,

wherein the pulse generation circuit comprises:

a first one-shot circuit for generating a first one-shot pulse signal, which has a first pulse width; and

a second one-shot circuit for generating a second one-shot pulse signal, which has a second pulse width that is greater than the first pulse width,

wherein the first transistor is turned off for a period corresponding to the first pulse width based on the first one-shot pulse signal, and the second transistor is turned off for a period corresponding to the second pulse width based on the second one-shot pulse signal.

2. The DC-DC converter according to claim 1 , wherein the control circuit includes a flip-flop circuit for receiving the clock signal and generating an activation signal for turning on the first transistor.

3. The DC-DC converter according to claim 1 , wherein the comparator stops operating in response to an operation control signal for controlling operation of the DC-DC converter.

4. The DC-DC converter according to claim 3 , wherein the comparator sets the switching control signal to a level that turns off the second transistor when the comparator stops operating in response to the operation control signal.

5. The DC-DC converter according to claim 1 , wherein the control circuit includes an oscillator for generating the clock signal, and the oscillator starts operating or stops operating in response to an operation control signal for controlling operation of the DC-DC converter.

6. The DC-DC converter according to claim 5 , further comprising:

an operation stop circuit, connected to the oscillator, for generating the operation control signal, wherein the operation stop circuit generates the operation control signal so that the oscillator continuously operates in a first mode in which the first transistor is controlled to continuously turn on and off, and the operation stop circuit generates the operation control signal based on the output voltage so that the oscillator intermittently operates in a second mode in which the first transistor is controlled to intermittently turn on and off.

7. The DC-DC converter according to claim 1 , wherein the second transistor and the comparator form an ideal diode.

8. The DC-DC converter according to claim 1 , wherein the DC-DC converter is a current controlled or voltage controlled DC-DC converter.

9. The DC-DC converter according to claim 1 , wherein the DC-DC converter is a step-up or step-down DC-DC converter.

10. The DC-DC converter according to claim 1 , wherein the control circuit turns on the first transistor with a clock signal, and wherein the pulse generation circuit generates the pulse signal in synchronization with the clock signal so as to turn off the second transistor.

11. A control circuit for a DC-DC converter that generates an output voltage from an input voltage, wherein the DC-DC converter includes a first transistor for receiving the input voltage, a second transistor connected to the first transistor, and a comparator, connected to the second transistor, for detecting current flowing through a choke coil to generate a switching control signal for controlling the second transistor to turn on and off, wherein the choke coil is connected to a node between the first transistor and the second transistor, wherein the control circuit controls the first transistor to turn on and off so as to keep the output voltage constant, the control circuit comprising:

a pulse generation circuit for generating a pulse signal for turning off the second transistor during a predetermined period from before the first transistor is turned on to after the first transistor is turned on,

wherein the pulse generation circuit comprises:

a first one-shot circuit for generating a first one-shot pulse signal which has a first pulse width; and

a second one-shot circuit for generating a second one-shot pulse signal, which has a second pulse width that is greater than the first pulse width,

wherein the first transistor is turned off for a period corresponding to the first pulse width based on the first one-shot pulse signal, and the second transistor is turned off for a period corresponding to the second pulse width based on the second one-shot pulse signal.

12. The control circuit according to claim 11 , further comprising:

a flip-flop circuit for receiving the clock signal and generating an activation signal for turning on the first transistor.

13. The control circuit according to claim 11 , wherein the comparator stops operating in response to an operation control signal for controlling operation of the DC-DC converter.

14. The control circuit according to claim 13 , wherein the comparator sets the switching control signal to a level that turns off the second transistor when the comparator stops operating in response to the operation control signal.

15. The control circuit according to claim 11 , further comprising:

an oscillator for generating the clock signal, wherein the oscillator starts operating or stops operating in response to an operation control signal for controlling operation of the DC-DC converter.

16. The control circuit according to claim 15 , further comprising:

an operation stop circuit, connected to the oscillator, for generating the operation control signal, wherein the operation stop circuit generates the operation control signal so that the oscillator continuously operates in a first mode in which the first transistor is controlled to continuously turn on and off, and the operation stop circuit generates the operation control signal based on the output voltage so that the oscillator intermittently operates in a second mode in which the first transistor is controlled to intermittently turn on and off.

17. A method for controlling a DC-DC converter that generates an output voltage from an input voltage, wherein the DC-DC converter includes a first transistor for receiving the input voltage, a second transistor connected to the first transistor, and a comparator, connected to the second transistor, for detecting current flowing through a choke coil to generate a switching control signal for controlling the second transistor to turn on and off, the method comprising:

controlling the first transistor to turn on and off so as to keep the output voltage constant;

detecting current flowing through the choke coil connected to a node between the first transistor and the second transistor; and

controlling the second transistor to turn on and off based on the current detected, wherein said controlling the second transistor includes generating a pulse signal so as to turn off the second transistor during a predetermined period from before the first transistor is turned on to after the first transistor is turned on,

wherein the first transistor and the second transistor are controlled using a first one-shot pulse signal that has a first pulse width and a second one-shot pulse signal that has a second pulse width, the second pulse width being greater than the first pulse width,

wherein the first transistor is turned off for a period corresponding to the first pulse width based on the first one-shot pulse signal, and the second transistor is turned off for a period corresponding to the second pulse width based on the second one-shot pulse signal.

18. The method according to claim 17 , wherein the controlling the first transistor includes turning on the first transistor with a clock signal, and wherein the controlling the second transistor includes generating the pulse signal in synchronization with the clock signal so as to turn off the second transistor.

Assignments (10)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036044/0745 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021977/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2006
From: HASEGAWA, MORIHITO; TSUCHIYA, CHIKARA; ITO, HIDENOBU
To: FUJITSU LIMITED
Reel/Frame 017898/0440 →
Priority Claims (2)
JP 2005-373476 · Dec 26, 2005 · national
JP 2006-055904 · Mar 2, 2006 · national
Continuity (1)
Related Publication 20070145961A1 · Jun 28, 2007