IP Library Granted Patent US 7,361,932
Granted Patent B2
US 7,361,932 · App. 11/474,391 · Granted Apr 22, 2008

Semiconductor device and method for fabricating the same

Assignee: Matsushita Electric Industrial Co., Ltd.
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Quick Facts
Patent No.
US 7,361,932
App. No.
11/474,391
Granted
Apr 22, 2008
Kind
B2
Abstract

A semiconductor device of a dual-gate structure including a P-channel type field-effect transistor formed at a first region of a substrate and an N-channel type field-effect transistor formed at a second region of the substrate, includes a gate electrode including a polycrystalline silicon film continuously formed on the substrate to cover the first and second regions and a metal silicide film formed on the polycrystalline silicon film. The polycrystalline silicon film has a P-type part located on the first region and an N-type part coming into contact with the P-type part and located on the second region, and the P-type part is further doped with a heavier element than a P-type impurity that determines a conductivity type of the P-type part.

Claims (9)

1. A semiconductor device of a dual-gate structure comprising: a P-channel type field-effect transistor formed at a first region of a substrate and an N-channel type field-effect transistor formed at a second region of the substrate, said device comprising:

a gate electrode including a polycrystalline silicon film continuously formed on the substrate to cover the first and second regions and a metal silicide film formed on the polycrystalline silicon film,

wherein the polycrystalline silicon film has a P-type part located on the first region and an N-type part coming into contact with the P-type part and located on the second region,

the P-type part is thicker than the N-type part,

an end part of the P-type part located above the N-type part and at the interface between the P-type part and the N-type part of the polycrystalline silicon film is normally tapered, and

a taper angle of the normally tapered end part is 40 through 60 degrees both inclusive.

2. The semiconductor device of claim 1 , wherein the difference in thickness between the P-type part and the N-type part is equal to or smaller than twice the thickness of the metal silicide film.

3. The semiconductor device of claim 1 , wherein the top surface of part of the polycrystalline silicon film including said interface is continuously formed.

4. The semiconductor device of claim 1 , wherein the semiconductor device is fabricated so that the difference in thickness between the P-type part and the N-type part is equal to or smaller than twice the thickness of a metal film formed for forming the metal silicide film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021930/0876 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2007
From: TSUZUMITANI, AKIHIKO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 019244/0883 →
Priority Claims (1)
JP 2005-284608 · Sep 29, 2005 · national
Continuity (1)
Related Publication 20070072371A1 · Mar 29, 2007