IP Library Granted Patent US 7,456,657
Granted Patent B2
US 7,456,657 · App. 11/490,151 · Granted Nov 25, 2008

Common input/output terminal control circuit

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,456,657
App. No.
11/490,151
Granted
Nov 25, 2008
Kind
B2
Abstract

A first data selection circuit selects a data signal among a plurality of data signals from a plurality of circuits, a first direction selection circuit selects a direction control signal of the same circuit among a plurality of direction control signals from these circuits. A data holding circuit and a direction holding circuit respectively hold the selected data signal and direction control signal. A second data selection circuit selects a data signal from the first data selection circuit or the data holding circuit. A second direction selection circuit selects the direction control signal from the first direction selection circuit or the direction holding circuit. An output circuit outputs, to a common input/output terminal, the data signal from the second data selection circuit in accordance with the direction control signal from the second direction selection circuit.

Claims (43)

1. A common input/output terminal control circuit, comprising:

a first data selection circuit for selecting and outputting a data signal to be transferred to a common input/output terminal from among a plurality of data signals respectively output from a plurality of circuits;

a direction selection circuit for selecting and outputting a direction control signal of the same circuit as a circuit of the data signal output from the first data selection circuit from among a plurality of direction control signals respectively output from the plurality of circuits;

a data holding circuit for holding the data signal output from the first data selection circuit;

a second data selection circuit for selecting and outputting one of the data signal output from the first data selection circuit and the data signal held by the data holding circuit; and

an output circuit for outputting, to the common input/output terminal, the data signal output from the second data selection circuit when the direction control signal output from the direction selection circuit indicates an output direction.

2. The common input/output terminal control circuit according to claim 1 , wherein:

the second data selection circuit selects and outputs the data signal held by the data holding circuit when a direction indicated by the direction control signal output from the direction selection circuit is switched from an output direction to an input direction.

3. The common input/output terminal control circuit according to claim 1 , further comprising:

a first detection circuit for detecting a change of a first selection signal controlling the first data selection circuit and the direction selection circuit;

a second detection circuit for detecting a change of the direction control signal output from the direction selection circuit; and

a third detection circuit for detecting a hazard condition from output signals of the first detection circuit and the second detection circuit, and for outputting a second selection signal controlling the second data selection circuit.

4. The common input/output terminal control circuit according to claim 3 , wherein:

the first detection circuit compares a value of the first selection signal before a prescribed time period elapses and a value of the first selection signal after the prescribed time period elapsed, and detects a change of the first data selection signal; and

the second detection circuit compares a value of the direction control signal before the prescribed time period elapses and a value of the direction control signal after the prescribed time period elapsed, and detects a change of the direction control signal.

5. The common input/output terminal control circuit according to claim 3 , further comprising:

a direction holding circuit for holding the direction control signal output from the direction selection circuit, wherein:

the third detection circuit changes a value of the second selection signal in accordance with a value of the direction control signal held by the direction holding circuit.

6. A common input/output terminal control circuit, comprising:

a data selection circuit for selecting and outputting a data signal to be transferred to a common input/output terminal from among a plurality of data signals respectively output from a plurality of circuits;

a first direction selection circuit for selecting and outputting a direction control signal of the same circuit as a circuit of the data signal output from the data selection circuit from among a plurality of direction control signals respectively output from the plurality of circuits;

a direction holding circuit for holding the direction control signal output from the first direction selection circuit;

a second direction selection circuit for selecting and outputting one of the direction control signal output from the first direction selection circuit and the direction control signal held by the direction holding circuit; and

an output circuit for outputting, to the common input/output terminal, the data signal output from the data selection circuit when the direction control signal output from the second direction selection circuit indicates an output direction.

7. The common input/output terminal control circuit according to claim 6 , wherein:

the second direction selection circuit selects and outputs the direction control signal held by the direction holding circuit when a direction indicated by the direction control signal output from the first direction selection circuit is switched from an input direction to an output direction.

8. The common input/output terminal control circuit according to claim 6 , further comprising:

a first detection circuit for detecting a change of a first selection signal controlling the data selection circuit and the first direction selection circuit;

a second detection circuit for detecting a change of the direction control signal output from the first direction selection circuit; and

a third detection circuit for detecting a hazard condition from output signals of the first detection circuit and the second detection circuit, and for outputting a second selection signal controlling the second direction selection circuit.

9. The common input/output terminal control circuit according to claim 8 , wherein:

the first detection circuit compares a value of the first selection signal before a prescribed time period elapses and a value of the first selection signal after the prescribed time period elapsed, and detects a change of the first data selection signal; and

the second detection circuit compares a value of the direction control signal before the prescribed time period elapses and a value of the direction control signal after the prescribed time period elapsed, and detects a change of the direction control signal.

10. The common input/output terminal control circuit according to claim 8 , wherein:

the third detection circuit changes a value of the second selection signal in accordance with a value of the direction control signal held by the direction holding circuit.

11. A common input/output terminal control circuit, comprising:

a first data selection circuit for selecting and outputting a data signal to be transferred to a common input/output terminal from among a plurality of data signals respectively output from a plurality of circuits;

a first direction selection circuit for selecting and outputting a direction control signal of the same circuit as a circuit of the data signal output from the first data selection circuit from among a plurality of direction control signals respectively output from the plurality of circuits;

a data holding circuit for holding the data signal output from the first data selection circuit

a direction holding circuit for holding the direction control signal output from the first direction selection circuit;

a second data selection circuit for selecting and outputting one of the data signal output from the first data selection circuit and the data signal held by the data holding circuit;

a second direction selection circuit for selecting and outputting one of the direction control signal output from the first direction selection circuit and the direction control signal held by the direction holding circuit; and

an output circuit for outputting, to the common input/output terminal, the data signal output from the second data selection circuit when the direction control signal output from the second direction selection circuit indicates an output direction.

Assignments (10)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036044/0745 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2006
From: FUKUTOYAMA, SADAHARU; MAEDA, MASAHIRO; KAGOHASHI, SATORU; KUBO, YUUJI; ITOU, YOSHIHARU; FUJITA, ATSUSHI
To: FUJITSU LIMITED
Reel/Frame 018117/0153 →
Priority Claims (1)
JP 2006-086708 · Mar 27, 2006 · national
Continuity (1)
Related Publication 20080001631A1 · Jan 3, 2008