Semiconductor integrated circuit
View Patent ↗A semiconductor integrated circuit effectively makes use of wiring channels of wiring formed by a damascene method. When first cells are used, since the M 1 power source lines are laid out at positions spaced away from a boundary between the cells, the power source lines are not combined in laying out a semiconductor integrated circuit. As a result, the width of the power source lines is not changed. Accordingly, an interval between the line and a line which is arranged close to the line, determined in response to a line width of the lines, can satisfy a design rule; and, hence, the reduction of the wiring channels can be obviated, whereby the supply rate of the wiring channels can be enhanced, and, further, the integrity of a semiconductor chip can be enhanced.
1. A semiconductor integrated circuit which is formed on one semiconductor substrate and which includes a first region and a second region, which is different from the first region,
wherein, in the first region, a plurality of first cells having respectively given functions are arranged in a first direction, as well as in a second direction orthogonal to the first direction,
wherein power source lines extend in the first direction and are arranged in the peripheral portions of the first cells,
wherein the power source lines in the peripheral portions of the first cell are laid out at positions spaced away in the second direction from a boundary defined between the first cell and another first cell which is arranged close to the first cell in the second direction,
wherein, in the second region, a plurality of second cells having respective given functions are arranged in the third direction as well as in a fourth direction orthogonal to the third direction,
wherein power source lines extend in the third direction and are arranged in the peripheral portions of the second cells,
wherein the power source line in the peripheral portion of one second cell is configured to be integrally formed with the power source line of another second cell, which is arranged close to the one second cell in the fourth direction, and
wherein the power source lines are formed by embedding conductive film into grooves formed in an insulating film.
2. A semiconductor integrated circuit according to claim 1 , wherein the power source lines of the first cells arranged too close to each other in the second direction include bridging portions which are bridgeable between the power source lines.
3. A seminconductor integrated circuit device according to claim 1 , wherein the power source lines are comprised of copper.
4. A semiconductor integrated circuit which is formed on one semiconductor substrate and which includes a first region and a second region, which is different from the first region,
wherein, in the first region, a plurality of first cells having respective given functions are arranged in a first direction as well as in a second direction orthogonal to the first direction,
wherein power source lines extend in the first direction and are arranged in the peripheral portions of the first cells,
wherein the power source lines in the peripheral portions of the first cell are laid out at positions away in the second direction from a boundary defined between the one first cell and another first cell which is arranged close to the first cell in the second direction,
wherein in the second region, a plurality of second cells having respective given functions are arranged in a third direction as well as in a fourth direction orthogonal to the third direction,
wherein the second cell includes wide-width lines which constitute power source lines arranged in peripheral portions of a second cell and arranged to extend in the third direction and narrow-width lines having a narrower line width than the wide-width lines and arranged to extend in the third direction,
wherein the power source line in the peripheral portion of a second cell is configured to be integrally formed with the power source line of another second cell, which is arranged close to the one second cell in the fourth direction, and
wherein the power source lines are formed by embedding conductive film into grooves formed in an insulating film.
5. A semiconductor integrated circuit acceding to claim 4 , wherein the power source lines of the first cells arranged too close to each other in the second direction include bridging portions which are bridgeable between the power source lines.
6. A semiconductor integrated circuit device according to claim 4 , wherein the power source lines are comprised of copper.