Optimized DFT implementation
The present invention relates to a method and apparatus for implementing a discrete Fourier transformation (DFT) of a predetermined vector size, wherein at least one DFT module is configured to perform DFTs of a first predetermined number and of a vector size corresponding to a second predetermined number, to multiply by twiddle factors, and to perform DFTs of said second predetermined number and of a vector size corresponding to said first predetermined number. At least two of the at least one DFT module are combined to obtain the predetermined vector size. Thereby, an implementation of non 2 x -radix Fourier transformation can be achieved with moderate hardware complexity.
1 . A method of implementing a discrete Fourier transformation (DFT) of a predetermined vector size, said method comprising:
a) providing at least one DFT module configured to perform DFTs of a first predetermined number and of a vector size corresponding to a second predetermined number, to multiply by twiddle factors, and to perform DFTs of said second predetermined number and of a first vector size corresponding to said first predetermined number; and
b) combining at least two of said at least one DFT module to obtain said predetermined vector size.
2 . A method according to claim 1 , wherein said first and second predetermined numbers are 5.
3 . A method according to claim 1 , further comprising:
providing an enhanced DFT module by combining said at least one DFT module with DFT means configured to perform DFTs of a third predetermined number and of a second vector size corresponding to a fourth predetermined number, and to multiply by twiddle factors; and
combining said at least one DFT module with said enhanced DFT module to obtain said predetermined vector size.
4 . A method according to claim 3 , wherein said first and second predetermined numbers are 5, said third predetermined number is 3, and said fourth predetermined number is 25.
5 . A method according to claim 1 , wherein said predetermined vector size is a value other than 2 x , x being an integer number.
6 . A method according to claim 1 , further comprising bypassing said DFT module if said predetermined vector size is smaller than the vector size of said DFT module.
7 . A method according to claim 1 , further comprising replacing a multiplication step by adding twiddle factors of different processing stages.
8 . A computer program, that when executed by a processor, is configured to control implementation of a discrete Fourier transformation (DFT), wherein the control process comprises:
providing at least one DFT module configured to perform DFTs of a first predetermined number and of a vector size corresponding to a second predetermined number, to multiply by twiddle factors, and to perform DFTs of said second predetermined number and of a first vestor size corresponding to said first predetermined number; and
combining at least two of said at least one DFT module to obtain said predetermined vector size.
9 . An apparatus for implementing a discrete Fourier transformation (DFT) of a predetermined vector size, said apparatus comprising:
a) at least two DFT modules, each configured to perform DFTs of a first predetermined number and of a second vector size corresponding to a second predetermined number, to multiply by twiddle factors, and to perform DFTs of said second predetermined number and of a first vector size corresponding to said first predetermined number; and
b) combining means for connecting said at least two DFT modules to obtain said predetermined vector size.
10 . An apparatus according to claim 9 , wherein said first and second predetermined numbers are 5.
11 . An apparatus according to claim 9 , wherein said at least two DFT modules comprise an enhanced DFT module in which said DFT module are connected with DFT means configured to perform DFTs of a third predetermined number and of a third vector size corresponding to a fourth predetermined number, and to multiply by twiddle factors, wherein said at least one DFT module is combined with said enhanced DFT module to obtain said predetermined vector size.
12 . An apparatus according to claim 11 , wherein said first and second predetermined numbers are 5, said third predetermined number is 3, and said fourth predetermined number is 25.
13 . An apparatus according to claim 9 , wherein said predetermined vector size is a value other than 2 x , x being an integer number.
14 . An apparatus according to claim 9 , wherein said DFT module comprises bypass means for bypassing said DFT module if said predetermined vector size is smaller than the vector size of said DFT module.
15 . An apparatus according to claim 9 , further comprising adding means for adding twiddle factors of different processing stages.
16 . An apparatus for implementing discrete Fourier transformation of a predetermined vector size, comprising:
means for performing discrete Fourier transformations of a first predetermined number and of a vector size corresponding to a second predetermined number, to multiply by twiddle factors, and to perform DFTs of said second predetermined number and of a first vector size corresponding to the first predetermined number; and
means for conbining at least two DFT modules to obtain the predetermined vector size.