IP Library Granted Patent US 7,616,054
Granted Patent B2
US 7,616,054 · App. 11/651,166 · Granted Nov 10, 2009

Multiple output power mode amplifier

Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
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Quick Facts
Patent No.
US 7,616,054
App. No.
11/651,166
Granted
Nov 10, 2009
Kind
B2
Abstract

A multi-mode power amplifier and an electronic device including the amplifier are described.

Claims (34)

1. An amplifier, comprising:

a high-power signal path;

a low-power signal path;

a bypass signal path, wherein no radio frequency (RF) switches are provided between an input and the bypass-signal path; and

an impedance matching and power dividing network provided between the input and each of the signal paths, wherein the impedance matching and power dividing network is adapted to provide one-half of a power of an input signal to the bypass signal path.

2. An amplifier as claimed in claim 1 , wherein the impedance matching and power dividing network is adapted to provide one-half of the power of the input signal to one of the high-power signal path or the low-power signal path.

3. An amplifier as claimed in claim 1 , wherein the bypass signal path further comprises a power amplifier (PA) bypass network adapted to transmit an input signal to an output with substantially no gain or substantially low gain.

4. An amplifier as claimed in claim 3 , wherein the PA bypass network further comprises a bypass amplifier and a bypass impedance matching network.

5. An amplifier as claimed in claim 1 , further comprising a controller adapted to engage the high-power signal path to conduct an input signal to an output, while preventing the low-power signal path from conducting a significant portion of the input signal.

6. An amplifier as claimed in claim 3 , wherein the PA bypass network further comprises a passive bypass impedance matching network and switching circuitry.

7. A radio frequency (RF) amplifier, comprising:

a high-power signal path, which includes a first amplifier and a second amplifier;

a low-power signal path, which includes the second amplifier;

a bypass power signal path, which includes a power amplifier (PA) bypass network; and

an impedance matching and power dividing network adapted to provide power to the bypass power signal path and to one of the high-power signal path or the low-power signal path.

8. An RF amplifier as claimed in claim 7 , wherein the bypass power signal path further comprises an impedance transformation network adapted to invert an input impedance at an output.

9. An RF amplifier as claimed in claim 8 , wherein the PA bypass network has a comparatively high output impedance and is connected to an input of the impedance transformation network.

10. An RE amplifier as claimed in claim 7 , further comprising a controller adapted to selectively:

turn on the first amplifier and the second amplifier to engage a high-power mode;

turn off the first amplifier and to turn on the second amplifier to engage a low-power mode; and

turn on the PA bypass network and turn off the first and second amplifiers in a bypass mode.

11. An RF amplifier as claimed in claim 10 , wherein the low-power signal path further comprises an impedance transformation network, having a comparatively high input impedance and a comparatively low output impedance.

12. An RF amplifier as claimed in claim 11 , wherein an output of the PA bypass network is connected to an input of the impedance transformation network, and the impedance transformation network provides a comparatively high output impedance.

13. An RF amplifier as claimed in claim 7 , wherein the impedance matching and power dividing network is adapted to provide approximately one-half of a power of an input signal to the bypass power signal path.

14. An electronic device, comprising:

a radio frequency (RF) amplifier, which further comprises:

a high-power signal path comprising a first amplifier and a second amplifier;

a low-power signal path comprising the second amplifier; a bypass signal path, wherein no radio frequency (RF) switches are provided between an input and the bypass-signal path; and

a controller adapted selectively to: turn on the first amplifier and the second amplifier to engage a high-power mode; turn off the first amplifier and to turn on the second amplifier to engage a low-power mode; and turn on the PA bypass network and turn off the first and second amplifiers in a bypass mode.

15. An electronic device as claimed in claim 14 , wherein:

the bypass power signal path includes a power amplifier (PA) bypass network; and the RF amplifier further comprises: an impedance matching and power dividing network adapted to provide power to the bypass power signal path and to one of the high-power signal path or the low-power signal path.

16. An electronic device as claimed in claim 14 , wherein the electronic device is one or a combination of one or more of: a mobile telephone; a personal digital assistant; a portable computer; a portable camera; a portable video player; a portable music player; a portable gaming device.

17. An electronic device as claimed in claim 15 , wherein the PA bypass network has a comparatively high output impedance and is connected to an input of an impedance transformation network.

18. An electronic device as claimed in claim 15 , wherein the impedance matching and power dividing network is adapted to provide approximately one-half of a power of an input signal to the bypass power signal path.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030369/0703 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2007
From: JEON, MOON-SUK; KIM, JUNG-HYUN; KWON, YOUNGWOO
To: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
Reel/Frame 019176/0963 →
Continuity (1)
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