IP Library Granted Patent US 7,585,731
Granted Patent B2
US 7,585,731 · App. 11/703,665 · Granted Sep 8, 2009

Semiconductor integrated circuit device and its manufacturing method

Assignee: Renesas Technology Corp.
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Quick Facts
Patent No.
US 7,585,731
App. No.
11/703,665
Granted
Sep 8, 2009
Kind
B2
Abstract

A method of manufacturing a semiconductor integrated circuit device is provided including providing a substrate with projecting island regions formed in stripes, with first regions of the substrate adjacent the projecting island regions and with a conductive film covering the projecting island regions and first regions. An insulating film is formed between the projecting island regions and conductive film, wherein the projecting island regions extend in a first direction in stripes. The conductive film is anisotropically etched using a mask covering portions of the conductive film to form conductive lines on sides of the projecting island regions and the portions of the conductive film integrated with the conductive lines, which conductive lines serve as common gate electrodes for MISFETs.

Claims (9)

1. A method of manufacturing a semiconductor integrated circuit device, comprising steps of:

providing a substrate with projecting island regions formed in stripes, with first regions of a main surface of the substrate adjacent to the projecting island regions and with a conductive film covering the projecting island regions and the first regions, wherein an insulating film is formed between the projecting island regions and the conductive film, and wherein the projecting island regions extend in a first direction in a stripe, respectively;

performing anisotropic etching of the conductive film by using a mask covering portions of the conductive film so as to form conductive lines on side surfaces of the projecting island regions and the portions of the conductive film integrated with the conductive lines; and

removing parts of the conductive lines in each of the projecting island regions,

wherein the conductive lines are adapted to serve as a common gate electrode for MISFETs arranged, in the first direction, adjacent to each other.

2. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the anisotropic etching is performed so as to form an electrode of a peripheral circuit element on the main surface through a gate insulating film by using the mask.

3. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the insulating film includes a film for discretely accumulating charge therein, and wherein the conductive lines serve as gate electrodes of the MISFETs of nonvolatile memory elements and have a shape of a side wall spacer formed in self-alignment to the side surface of the projecting island regions, respectively.

4. A method of manufacturing a semiconductor integrated circuit device according to claim 3 , wherein the insulating film includes a silicon nitride film.

5. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , wherein the insulating film includes a silicon nitride film.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Jul 30, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025204/0512 →
Continuity (3)
Continuation 1140183900 · Apr 12, 2006
Continuation 1048733600 · Feb 20, 2004
Related Publication 20070134865A1 · Jun 14, 2007