Method for forming patterns on a semiconductor device using a lift off technique
Provided is a technique of improving the properties of a bipolar transistor. Described specifically, upon formation of a collector electrode around a base mesa by the lift-off method, a resist film is formed over connection portions between the outer periphery of a region OA 1 and a region in which the base mesa 4 a is formed, followed by successive formation of gold germanium (AuGe), nickel (Ni) and Au in the order of mention over the entire surface of a substrate so that the stacked film of them will not become an isolated pattern. As a result, the stacked film over the base mesa 4 a is connected to a stacked film at the outer periphery of the region OA 1 , facilitating peeling of the stacked film over the base mesa 4 a . In addition, generation of side etching upon formation of a via hole extending from the back side of the substrate to a backside via electrode is reduced by forming the backside via electrode using a material such as WSi which hardly reacts with an n type GaAs layer or n type InGaAs layer.
1. A semiconductor device, comprising:
(a) a semiconductor substrate including a first region, a second region encompassing the first region therewith, and a third region encompassing the second region therewith;
(b) a collector layer formed in the first region and the second region;
(c) a base layer formed in the first region over the collector layer;
(d) an emitter layer formed over the base layer; and
(e) a collector electrode formed in the second region over the collector layer and having a first portion and a second portion separated from each other by two cutout portions.
2. A semiconductor device according to claim 1 ,
wherein the collector layer and the base layer are each comprised of gallium arsenide (GaAs), while the emitter layer is comprised of indium gallium phosphide (InGaP) or aluminum gallium arsenide (AlGaAs), and
wherein the collector electrode is comprised of a film having gold (Au) as a main component.
3. A semiconductor device according to claim 1 , wherein the first region has a substantially circular shape or a circular shape with a portion cut out thereof.
4. A semiconductor device according to claim 1 , wherein the two cutout portions are arranged substantially symmetrical to the first region.