Voltage regulator
In some embodiments, a voltage regulator assembly comprises a first voltage regulator circuit selectively coupled to a first input voltage and comprising a first inductor, a second regulator circuit selectively coupled to the first input voltage and comprising a second inductor to inductively couple the second regulator circuit to the first voltage regulator circuit, a bypass switch coupled to the second regulator circuit, and a controller coupled to the bypass switch comprising logic to activate the bypass switch when a load on the voltage regulator assembly falls below a threshold. Other embodiments may be described.
1 . A voltage regulator assembly, comprising:
a first voltage regulator circuit selectively coupled to a first input voltage and comprising a first inductor;
a second regulator circuit selectively coupled to the first input voltage and comprising a second inductor which is magnetically coupled with the inductor in the first voltage regulator;
a bypass switch coupled to the second regulator circuit; and
a controller coupled to the bypass switch comprising logic to activate the bypass switch when a load on the voltage regulator assembly falls below a threshold.
2 . The voltage regulator assembly of claim 1 , wherein the controller further comprises logic to deactivate the bypass switch when a load on the voltage regulator assembly exceeds a threshold.
3 . The voltage regulator assembly of claim 1 , further comprising a switch to selectively couple the first regulator circuit to a power source.
4 . The voltage regulator assembly of claim 1 , further comprising a switch to selectively couple the second regulator circuit to a power source.
5 . The voltage regulator assembly of claim 1 , wherein the controller further comprises logic to decouple the first regulator circuit from the power source when a load on the voltage regulator assembly falls below a threshold.
6 . The voltage regulator assembly of claim 5 , wherein the controller further comprises logic to decouple the second regulator circuit from the power source when a load on the voltage regulator assembly falls below a threshold.
7 . The voltage regulator assembly of claim 1 , wherein:
the first voltage regulator circuit receives input having a first phase; and
the second voltage regulator circuit receives input having a second phase, different from the first phase.
8 . A system, comprising:
a display;
at least one integrated circuit; and
a voltage regulator assembly, comprising:
a first voltage regulator circuit selectively coupled to a first input voltage and comprising a first inductor; and
a second regulator circuit selectively coupled to the first input voltage and comprising a second inductor to inductively couple the second regulator circuit to the first voltage regulator circuit;
a bypass switch in the second regulator circuit; and
a controller coupled to the bypass switch comprising logic to activate the bypass switch when a load on the voltage regulator assembly falls below a threshold.
9 . The system of claim 8 , wherein the controller further comprises logic to deactivate the bypass switch when a load on the voltage regulator assembly exceeds a threshold.
10 . The system of claim 8 , further comprising a switch to selectively couple the first regulator circuit to a power source.
11 . The system of claim 8 , further comprising a switch to selectively couple the second regulator circuit to a power source.
12 . The system of claim 11 , wherein the controller further comprises logic to decouple the second regulator circuit from the power source when a load on the voltage regulator assembly falls below a threshold.
13 . The system of claim 11 , wherein the controller further comprises logic to decouple the second regulator circuit from the power source when a load on the voltage regulator assembly falls below a threshold.
14 . The system of claim 8 , wherein:
the first voltage regulator circuit receives input having a first phase; and
the second voltage regulator circuit receives input having a second phase, different from the first phase.