Current feedback amplifiers
View Patent ↗Current feedback amplifiers circuits that generate common mode (CM) and/or differential mode (DM) currents are provided herein. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures and the claims.
1. A current feedback amplifier circuit, comprising:
a first input buffer ( 406 a ) that provides a first non-inverting input (IN+A) of the amplifier circuit, provides a first inverting input (IN−A) of the amplifier circuit, and produces a first plurality of currents;
a second input buffer ( 406 b ) that provides a second non-inverting input (IN+B) of the amplifier circuit, provides a second inverting input (IN−B) of the amplifier circuit, and produces a second plurality of currents;
first and second high impedance nodes ( 414 a and 414 b );
a plurality of current mirrors to provide currents, proportional to sums of specific currents of the first and second plurality of currents, to the high impedance nodes;
a first output buffer ( 408 a ) having an input connected to the first high impedance node ( 414 a ), and having an output that provides a first output (OUTA) of the amplifier circuit; and
a second output buffer ( 408 b ) having an input connected to the second high impedance node ( 414 b ), and having an output that provides a second output (OUTB) of the amplifier circuit;
wherein the first plurality of currents are proportional to a difference between an input voltage provided to the first non-inverting input (IN+A) of the amplifier circuit and a fraction of its associated output voltage at the first output (OUTA); and
wherein the second plurality of currents are proportional to a difference between an input voltage provided to the second non-inverting input (IN+B) of the amplifier circuit and a fraction of its associated output voltage at the second output (OUTB).
2. The amplifier circuit of claim 1 , wherein a feedback resistor connects the first output (OUTA) of the amplifier circuit to the first inverting input (IN−A) of the amplifier circuit.
3. The amplifier circuit of claim 2 , wherein a second feedback resistor connects the second output (OUTB) of the amplifier circuit to the second inverting input (IN−B) of the amplifier circuit.
4. The amplifier circuit of claim 3 , wherein the first non-inverting input (IN+A) is connected to the second non-inverting input (IN+B).
5. The amplifier circuit of claim 1 , wherein the first non-inverting input (IN+A) is connected to the second non-inverting input (IN+B).
6. A current feedback amplifier circuit, comprising:
an input buffer ( 406 a ) that provides a non-inverting input (IN+A) of the amplifier circuit, provides an inverting input (IN−A) of the amplifier circuit, and produces a plurality of currents;
first and second high impedance nodes ( 414 a and 414 b );
a first plurality of current mirrors that provides mirrored versions of specific ones of the plurality of currents to the first high impedance node ( 414 a );
a second plurality of current mirrors that provides mirrored versions of specific ones of the plurality of currents to the second high impedance node ( 414 b );
a first output buffer ( 408 a ) having an input connected to the first high impedance node ( 414 a ), and having an output that provides a first output (OUTA) of the amplifier circuit; and
a second output buffer ( 408 b ) having an input connected to the second high impedance node ( 414 b ), and having an output that provides a second output (OUTB) of the amplifier circuit;
wherein the plurality of currents are proportional to a difference between an input voltage provided to the non-inverting input (IN+A) of the amplifier circuit and a fraction of its associated output voltage at the first output (OUTA).
7. The amplifier circuit of claim 6 , wherein a feedback resistor connects the first output (OUTA) of the amplifier circuit to the inverting input (IN−A) of the amplifier circuit.
8. The amplifier circuit of claim 7 , wherein a second feedback resistor connects the second output (OUTB) of the amplifier circuit to the inverting input (IN−A) of the amplifier circuit.
9. A current feedback amplifier circuit, comprising:
a first input buffer ( 906 a ) that provides a non-inverting input (IN+A) of the amplifier circuit, provides an inverting input (IN−A) of the amplifier circuit, and produces a first plurality of currents;
a second input buffer ( 906 b ) that provides a second non-inverting input (IN+B) of the amplifier circuit, provides a second inverting input (IN−B) of the amplifier circuit, and produces a second plurality of currents;
first and second high impedance nodes 914 a and 914 b;
a first output buffer ( 908 a ) having an input connected to the first high impedance node ( 914 a ), and having an output that provides a first output (OUTA) of the amplifier circuit; and
a second output buffer ( 908 b ) having an input connected to the second high impedance node ( 914 b ), and having an output the provides a second output (OUTB) of the amplifier circuit;
a first plurality of current mirrors each of which includes at least one corresponding input and at least two corresponding outputs; and
a second plurality of current mirrors each of which includes at least one corresponding input and at least two corresponding outputs;
wherein two of the outputs of the first plurality of current mirrors are connected to the first high impedance node ( 914 a );
wherein two of the outputs of the second plurality of current mirrors are connected to the second high impedance node ( 914 b );
wherein each of the first plurality of current mirrors receives at one or more input of the current mirror one of the first plurality of currents and a current output by one of the outputs of one of the second plurality of current mirrors; and
wherein each of the second plurality of current mirrors receives at one or more input of the current mirror one of the second plurality of currents and a current output by the one of the outputs of one of the first plurality of current mirrors.
10. The amplifier circuit of claim 9 , wherein:
the first plurality of currents are proportional to a difference between an input voltage provided to the first non-inverting input (IN+A) of the amplifier circuit and a fraction of its associated output voltage at the first output (OUTA); and
the second plurality of current are proportional to a difference between an input voltage provided to the second non-inverting input (IN+B) of the amplifier circuit and a fraction of its associated output voltage at the second output (OUTB).
11. The amplifier circuit of claim 10 , wherein for each of the first and second plurality of current mirrors, one of the outputs of the current mirror has a lower current gain than another one of the outputs.
12. The amplifier circuit of claim 9 , wherein for each of the first and second plurality of current mirrors, one of the outputs of the current mirror has a lower current gain than another one of the outputs.
13. A current feedback amplifier circuit, comprising:
a first input buffer ( 1106 a ) that provides a first DM input (IN+DM) of the amplifier circuit, provides a first feedback node (FB+) of the amplifier circuit, and produces a first plurality of currents;
a second input buffer ( 1106 b ) that provides a second DM input (IN−DM) of the amplifier circuit, provides a second feedback node (FB−) of the amplifier circuit, and produces a second plurality of currents;
a third input buffer ( 1106 c ) that provides a CM input (IN_CM) of the amplifier circuit, has an output ( 1104 c ), and produces a third plurality of currents;
first and second high impedance nodes ( 1114 a and 1114 b );
a first output buffer ( 1108 a ) having an input connected to the first high impedance node ( 1114 a ), and having an output that provides a first output (OUTA) of the amplifier circuit;
a second output buffer ( 1108 b ) having an input connected to the second high impedance node ( 1114 b ), and having an output that provides a second output (OUTB) of the amplifier circuit;
a first plurality of current mirrors each of which includes at least one corresponding input and at least two corresponding outputs; and
a second plurality of current mirrors each of which includes at least one corresponding input and at least two corresponding outputs;
wherein each of the first plurality of current mirrors receives one of the first plurality of currents and one of the third plurality of currents at one or more input of the current mirror, has one of the second plurality of currents drawn from one of its outputs, and has a further one of its outputs connected to the first high impedance node ( 1114 a ); and
wherein each of the second plurality of current mirrors receives one of the second plurality of currents and one of the third plurality of currents at one or more input of the current mirror, has one of the first plurality of currents drawn from one of its outputs, and has a further one of its outputs connected to the second high impedance node ( 1114 b ).
14. The amplifier circuit of claim 13 , wherein:
the first plurality of currents are proportional to a difference between an input voltage provided to the first DM input (IN+DM) of the amplifier circuit and a fraction of its associated output voltage at the first output (OUTA);
the second plurality of currents are proportional to a difference between an input voltage provided to the second DM input (IN−DM) of the amplifier circuit and a fraction of its associated output voltage at the second output (OUTB); and
the third plurality of currents are proportional to a difference between an input voltage provided to the CM input (IN_CM) of the amplifier circuit and a fraction of its associated output voltage at the output ( 1104 c ) of the third input buffer ( 1106 c ).
15. The amplifier circuit of claim 14 , wherein:
a first feedback resistor connects the first output (OUTA) of the amplifier circuit to the first feedback node (FB+) of the amplifier circuit;
a second feedback resistor connects the second output (OUTB) of the amplifier circuit to the second feedback node (FB−) of the amplifier circuit;
a third feedback resistor connects the first output (OUTA) of the amplifier circuit to the output ( 1104 c ) of the third input buffer ( 1106 c ); and
a fourth feedback resistor connects the second output (OUTB) of the amplifier circuit to the output ( 1104 c ) of the third input buffer ( 1106 c ).
16. The amplifier circuit of claim 13 , wherein:
a first feedback resistor connects the first output (OUTA) of the amplifier circuit to the first feedback node (FB+) of the amplifier circuit;
a second feedback resistor connects the second output (OUTB) of the amplifier circuit to the second feedback node (FB−) of the amplifier circuit;
a third feedback resistor connects the first output (OUTA) of the amplifier circuit to the output ( 1104 c ) of the third input buffer ( 1106 c ); and
a fourth feedback resistor connects the second output (OUTB) of the amplifier circuit to the output ( 1104 c ) of the third input buffer ( 1106 c ).
17. A current feedback amplifier circuit, comprising:
a first input buffer ( 806 a or 1106 a ) that provides a first DM input (IN+DM) of the amplifier circuit, provides a first feedback node (FB+) of the amplifier circuit, and produces a first plurality of currents;
a second input buffer ( 806 a or 1106 b ) that provides a second DM input (IN−DM) of the amplifier circuit, provides a second feedback node (FB−) of the amplifier circuit, and produces a second plurality of currents;
a third input buffer ( 806 c or 1106 c ) that provides a CM input (IN_CM) of the amplifier circuit, has an output ( 804 c or 1104 c ), and produces a third plurality of currents;
first and second high impedance nodes ( 814 a or 1114 a , and 814 b or 1114 b );
a first output buffer ( 808 a or 1108 a ) having an input connected to the first high impedance node ( 814 b or 1114 a ), and having an output that provides a first output (OUTA) of the amplifier circuit;
a second output buffer ( 808 b or 1108 b ) having an input connected to the second high impedance node ( 814 b or 1114 b ), and having an output that provides a second output (OUTB) of the amplifier circuit;
a first plurality of current mirrors each of which includes at least one corresponding input and at least one corresponding output;
a second plurality of current mirrors each of which includes at least one corresponding input and at least one corresponding output;
wherein two outputs, of the first plurality of current mirrors, are connected to the first high impedance node ( 814 a or 1114 a );
wherein two outputs, of the second plurality of current mirrors, are connected to the second high impedance node ( 814 b or 1114 b );
wherein each of the first plurality of current mirrors, or each of a pair of the first plurality of current mirrors, receives one of the first plurality of currents and one of the third plurality of currents at one or more input, and has one of the second plurality of currents drawn from one of its outputs; and
wherein each of the second plurality of current mirrors, or each of a pair of the second plurality of current mirrors, receives one of the second plurality of currents and one of the third plurality of currents at one or more input, and has one of the first plurality of currents drawn from one of its outputs.
18. The amplifier circuit of claim 17 , wherein:
the first plurality of currents are proportional to a difference between an input voltage provided to the first DM input (IN+DM) of the amplifier circuit and a fraction of its associated output voltage at the first output (OUTA);
the second plurality of currents are proportional to a difference between an input voltage provided to the second DM input (IN−DM) of the amplifier circuit and a fraction of its associated output voltage at the second output (OUTB); and
the third plurality of currents are proportional to a difference between an input voltage provided to the CM input (IN_CM) of the amplifier circuit and a fraction of its associated output voltage at the output ( 804 c or 1104 c ) of the third input buffer ( 1106 c ).
19. The amplifier circuit of claim 18 , wherein:
a first feedback resistor connects the first output (OUTA) of the amplifier circuit to the first feedback node (FB+) of the amplifier circuit;
a second feedback resistor connects the second output (OUTB) of the amplifier circuit to the second feedback node (FB−) of the amplifier circuit;
a third feedback resistor connects the first output (OUTA) of the amplifier circuit to the output ( 804 c or 1104 c ) of the third input buffer ( 806 c or 1106 c ); and
a fourth feedback resistor connects the second output (OUTB) of the amplifier circuit to the output ( 804 c or 1104 c ) of the third input buffer ( 806 c or 1106 c ).
20. The amplifier circuit of claim 17 , wherein:
a first feedback resistor connects the first output (OUTA) of the amplifier circuit to the first feedback node (FB+) of the amplifier circuit;
a second feedback resistor connects the second output (OUTB) of the amplifier circuit to the second feedback node (FB−) of the amplifier circuit;
a third feedback resistor connects the first output (OUTA) of the amplifier circuit to the output ( 804 c or 1104 c ) of the third input buffer ( 806 c or 1106 c ); and
a fourth feedback resistor connects the second output (OUTB) of the amplifier circuit to the output ( 804 c or 1104 c ) of the third input buffer ( 806 c or 1106 c ).