IP Library Granted Patent US 7,858,034
Granted Patent B2
US 7,858,034 · App. 11/775,724 · Granted Dec 28, 2010

Circuits for the control of output current in an electronic device for performing active biological operations

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,858,034
App. No.
11/775,724
Granted
Dec 28, 2010
Kind
B2
Abstract

A circuit for control of an output current in a multiple unit cell array includes an array of unit cells arranged in rows and columns. Each unit cell includes a column select transistor being adapted for control by a column selector and a row select transistor being adapted for control by a row selector. The column select transistor and the row select transistor are connected together in series to each other and between an output node and a first supply. A return electrode is provided to complete the circuit.

Claims (10)

1. A circuit for control of an output current in a multiple unit cell array, comprising:

an array of unit cells arranged in rows and columns, wherein each unit cell comprises:

a column select transistor adapted for control by a column selector;

a row select transistor adapted for control by a row selector, the column select transistor and the row select transistor being connected in series to each other and between an output node and a first supply;

a second column select transistor adapted for control by a column selector;

a second row select transistor adapted for control by a row selector, the second column select transistor and the second row select transistor being connected in series to each other and between the output node and a second supply; and

a return electrode.

2. The circuit of claim 1 wherein the first supply is Vcc.

3. The circuit of claim 1 wherein the second supply is ground.

4. The circuit of claim 1 wherein the row select transistors and the column select transistors are field effect transistors.

Assignments (4)
ORDER RELEASING SECURITY AGREEMENTS AND AUTHORIZING ASSIGNMENT Recorded Jan 25, 2011
From: PORTSIDE GROWTH & OPPORTUNITY FUND
To: ELITECH HOLDING B.V.
Reel/Frame 025690/0537 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2010
From: ELITECH HOLDING B.V.
To: GAMIDA FOR LIFE B.V.
Reel/Frame 024260/0195 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2009
From: NANOGEN, INC.; EPOCH BIOSCIENCES, INC.; NANOTRONICS, INC.
To: ELITECH HOLDING B.V.
Reel/Frame 023004/0585 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2007
From: ACKLEY, DONALD E.; GRAHAM, SCOTT O.
To: NANOGEN, INC.
Reel/Frame 019539/0395 →