IP Library Granted Patent US 7,718,526
Granted Patent B2
US 7,718,526 · App. 11/778,494 · Granted May 18, 2010

Fabrication method of semiconductor integrated circuit device

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Quick Facts
Patent No.
US 7,718,526
App. No.
11/778,494
Granted
May 18, 2010
Kind
B2
Abstract

A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.

Claims (12)

1. A method of fabricating a semiconductor integrated circuit device comprising the steps of:

(a) forming a first insulating film having openings over a semiconductor wafer;

(b) forming a first conductive film over the first insulating film;

(c) after the step (b), removing the first conductive film on an edge of the semiconductor wafer by a polishing method using a slurry or an abrasive wheel, wherein the polishing method is comprised of three polishing wheels for polishing an upper surface, edge portion and rear surface of the semiconductor wafer; and

(d) after the step (c), forming conductive patterns in the openings by polishing the first conductive film.

2. A method according to claim 1 , wherein the first conductive film includes copper as a main component.

3. A method of fabricating a semiconductor integrated circuit device comprising the steps of:

(a) forming a first insulating film over a semiconductor wafer;

(b) forming a first conductive film over the first insulating film;

(c) after the step (b), removing the first conductive film on an edge of the semiconductor wafer by a polishing method using a slurry or an abrasive wheel, wherein the polishing method is comprised of three polishing wheels for polishing an upper surface, edge portion and rear surface of the semiconductor wafer; and

(d) after the step (c), patterning the first conductive film by a dry etching method so as to form conductive patterns.

4. A method according to claim 3 , wherein the first conductive film includes aluminum as a main component.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Jul 30, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025204/0512 →