IP Library Granted Patent US 7,721,136
Granted Patent B2
US 7,721,136 · App. 11/834,352 · Granted May 18, 2010

Systems and methods providing input/output fencing in shared storage environments

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Quick Facts
Patent No.
US 7,721,136
App. No.
11/834,352
Granted
May 18, 2010
Kind
B2
Abstract

Systems and methods for I/O fencing in a shared storage environment are provided. Prior to initiating an I/O request, when feasible, the current time from a local timer is compared to the current state of an interval obtained for the target device. As a result, a device reset occurring while the interval is viable does not arbitrarily end a multiphase I/O operation. However, a device reset occurring once the lease has expired results in a delay or termination of the multiphase I/O operation. As a result, multiphase I/O operations from initiating hosts that have lost contact with the shared storage environment are not allowed to corrupt the shared storage devices.

Claims (40)

1. A computer-implemented method of Input/Output (I/O) fencing comprising:

establishing an end time of a time interval after which access is not allowed to a target device by a requesting device;

obtaining a first time value at the requesting device prior to initiating a first phase of a multiphase operation to the target device, wherein the multiphase operation comprises a plurality of phases including at least the first phase and a subsequent phase, wherein the first phase comprises transmission of a write request, and wherein the subsequent phase comprises transmission of data to be written;

determining that the first time value at the requesting device is not greater than the end time;

initiating the first phase of the multiphase operation in response to determining that the first time value at the requesting device is not greater than the end time;

obtaining a subsequent time value at the requesting device prior to initiating the subsequent phase;

determining that the subsequent time value at the requesting device is greater than the end time; and

automatically interfering with the multiphase operation in response to determining that the subsequent time value at the requesting device is greater than the end time.

2. The method of claim 1 , wherein the interfering delays the multiphase operation.

3. The method of claim 1 , wherein the multiphase operation is a SCSI four phase write operation.

4. The method of claim 1 , wherein the multiphase operation is a login-based multiphase operation.

5. An Input/Output (I/O) fencing system comprising:

a reliable clock for establishing an end time of a time interval after which access is not allowed to a target device by a requesting device;

means for obtaining a first time value at the requesting device prior to initiating a first phase of a multiphase operation to the target device, wherein the multiphase operation comprises a plurality of phases including at least the first phase and a subsequent phase, wherein the first phase comprises transmission of a write request, and wherein the subsequent phase comprises transmission of data to be written;

means for determining that the first time value at the requesting device is not greater than the end time;

means for initiating the first phase of the multiphase operation in response to determining that the first time value at the requesting device is not greater than the end time;

means for obtaining a subsequent time value at the requesting device prior to initiating the subsequent phase;

means for determining that the subsequent time value at the requesting device is greater than the end time; and

means for automatically interfering with the multiphase operation in response to determining that the subsequent time value at the requesting device is greater than the end time.

6. The system of claim 5 , wherein the interfering means comprises means for ceasing the multiphase operation.

7. The system of claim 5 , wherein the interfering means comprises means for delaying the multiphase operation.

8. The system of claim 5 , wherein the multiphase operation is a SCSI four phase write operation.

9. The system of claim 5 , wherein the multiphase operation is a straight multiphase operation.

10. The system of claim 5 , wherein the multiphase operation is a login-based multiphase operation.

11. The system of claim 5 , wherein the time interval is a quorum time interval.

12. The system of claim 5 , wherein the time interval is a lease.

13. A system comprising:

at least one processor;

a clock coupled to the at least one processor; and

a memory coupled to the at least one processor, wherein the memory stores program instructions executable by the at least one processor to:

establish an end time of a time interval after which access is not allowed to a target device;

obtain a first time value from the clock prior to initiating a first phase of a multiphase operation to the target device, wherein the multiphase operation comprises a plurality of phases including at least the first phase and a subsequent phase, wherein the first phase comprises transmission of a write request, and wherein the subsequent phase comprises transmission of data to be written;

determine that the first time value is not greater than the end time;

initiate the first phase of the multiphase operation in response to determining that the first time value is not greater than the end time;

obtain a subsequent time value from the clock prior to initiating the subsequent phase;

determine that the subsequent time value is greater than the end time; and

interfere with the multiphase operation in response to determining that the subsequent time value is greater than the end time.

14. The system of claim 13 , wherein the interfering delays the multiphase operation.

15. The system of claim 13 , wherein the multiphase operation is a SCSI four phase write operation.

16. The system of claim 13 , wherein the multiphase operation is a login-based multiphase operation.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Dec 16, 2024
From: ACQUIOM AGENCY SERVICES LLC, AS COLLATERAL AGENT
To: VERITAS TECHNOLOGIES LLC (F/K/A VERITAS US IP HOLDINGS LLC)
Reel/Frame 069712/0090 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2024
From: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: VERITAS TECHNOLOGIES LLC
Reel/Frame 069634/0584 →
ASSIGNMENT OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Nov 25, 2024
From: BANK OF AMERICA, N.A., AS ASSIGNOR
To: ACQUIOM AGENCY SERVICES LLC, AS ASSIGNEE
Reel/Frame 069440/0084 →
TERMINATION AND RELEASE OF SECURITY IN PATENTS AT R/F 037891/0726 Recorded Nov 30, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: VERITAS US IP HOLDINGS, LLC
Reel/Frame 054535/0814 →
SECURITY INTEREST Recorded Aug 20, 2020
From: VERITAS TECHNOLOGIES LLC
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 054370/0134 →
MERGER AND CHANGE OF NAME Recorded Apr 18, 2016
From: VERITAS US IP HOLDINGS LLC; VERITAS TECHNOLOGIES LLC
To: VERITAS TECHNOLOGIES LLC
Reel/Frame 038455/0752 →
SECURITY INTEREST Recorded Feb 23, 2016
From: VERITAS US IP HOLDINGS LLC
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 037891/0726 →
SECURITY INTEREST Recorded Feb 23, 2016
From: VERITAS US IP HOLDINGS LLC
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037891/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: SYMANTEC CORPORATION
To: VERITAS US IP HOLDINGS LLC
Reel/Frame 037697/0412 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 019872 FRAME 979. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNEE IS SYMANTEC OPERATING CORPORATION. Recorded Mar 5, 2012
From: VERITAS OPERATING CORPORATION
To: SYMANTEC OPERATING CORPORATION
Reel/Frame 027819/0462 →
CHANGE OF NAME Recorded Sep 26, 2007
From: VERITAS OPERATING CORPORATION
To: SYMANTEC CORPORATION
Reel/Frame 019872/0979 →