Semiconductor integrated circuit device and a method of manufacturing the same
View Patent ↗A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor substrate. Thereafter, the barrier layer and the copper film are removed from outside of the groove for wiring, thereby forming a wiring. Tungsten is selectively or preferentially grown on the wiring to selectively form a tungsten film on the wiring. After the formation of the copper film, a treatment with hydrogen may be performed. After the formation of the wiring, the semiconductor substrate may be cleaned with a cleaning solution capable of removing a foreign matter or a contaminant metal. After the formation of the wiring, a treatment with hydrogen is carried out.
1. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
(a) forming a first insulating film over a semiconductor substrate;
(b) forming a first wiring trench in the first insulating film;
(c) forming a first wiring line in the first wiring trench, the first wiring line including a first conductive film comprised of a copper material as a main component;
(d) forming a second insulating film over the first wiring line and the first insulating film;
(e) forming a contact hole in the second insulating film;
(f) forming a resist film over the second insulating film and in the contact hole such that the contact hole is filled with the resist film;
(g) after the step (f), forming a mask layer over the resist film,
(h) after the step (g), by using the mask layer as a mask, etching the resist film and the second insulating film to form a second wiring trench in the second insulating film;
(i) after the step (h), removing the resist film and the mask layer; and
(j) after the step (i), forming a second wiring line and a plug in the second wiring trench and in the contact hole.
2. A method of manufacturing a semiconductor integrated circuit device according to claim 1 , further comprising:
a step of forming a barrier metal layer on the first wiring line between the steps (c) and (d).
3. A method of manufacturing a semiconductor integrated circuit device according to claim 2 ,
wherein the barrier metal layer is comprised of a tungsten film, a TiN, Ta, TaN, WN or Ni film.
4. A method of manufacturing a semiconductor integrated circuit device according to claim 1 ,
wherein the second insulating film is formed of an organic film.
5. A method of manufacturing a semiconductor integrated circuit device according to claim 1 ,
wherein the second insulating film is formed of a SiOF film.
6. A method of manufacturing a semiconductor integrated circuit device according to claim 1 ,
wherein the second insulating film includes a etching stopper film, and
wherein the second wiring trench is formed by using the etching stopper film in the step (h).
7. A method of manufacturing a semiconductor integrated circuit device according to claim 1 ,
wherein the second wiring trench is formed by controlling the etching time in the step (h).
8. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
(a) forming a first insulating film over a semiconductor substrate;
(b) forming a first wiring trench in the first insulating film;
(c) forming a first wiring line in the first wiring trench, the first wiring line including a first conductive film comprised of a copper material as a main component;
(d) forming a second insulating film over the first wiring line and the first insulating film;
(e) forming a contact hole in the second insulating film;
(f) forming an anti-reflecting film over the second insulating film and in the contact hole such that the contact hole is filled with the anti-reflecting film;
(g) after the step (f), forming a photoresist film over the anti-reflecting film,
(h) after the step (g), by using the photoresist film as a mask, etching the anti-reflecting film and the second insulating film to form a second wiring trench in the second insulating film, wherein the anti-reflecting film is kept under the photoresist film and inside of the contact hole;
(i) after the step (h), removing the photoresist film and the anti-reflecting film; and
(j) after the step (i), forming a second wiring line and a plug in the second wiring trench and in the contact hole, wherein the second wiring line and the plug include a second conductive film comprised of a copper material as a main component.
9. A method of manufacturing a semiconductor integrated circuit device according to claim 8 , further comprising:
a step of forming a barrier metal layer on the first wiring line between the steps (c) and (d).
10. A method of manufacturing a semiconductor integrated circuit device according to claim 9 ,
wherein the barrier metal layer is comprised of a tungsten film, a TiN, Ta, TaN, WN or Ni film.
11. A method of manufacturing a semiconductor integrated circuit device according to claim 8 ,
wherein the second insulating film is formed of an organic film.
12. A method of manufacturing a semiconductor integrated circuit device according to claim 8 ,
wherein the second insulating film is formed of a SiOF film.
13. A method of manufacturing a semiconductor integrated circuit device according to claim 8 ,
wherein the second insulating film includes a etching stopper film, and
wherein the second wiring trench is formed by using the etching stopper film in the step (h).
14. A method of manufacturing a semiconductor integrated circuit device according to claim 8 ,
wherein the second wiring trench is formed by controlling the etching time in the step (h).
15. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
(a) forming a first insulating film over a semiconductor substrate;
(b) forming a first wiring trench in the first insulating film;
(c) forming a first wiring line in the first wiring trench, the first wiring line including a first conductive film comprised of a copper material as a main component;
(d) forming a second insulating film over the first wiring line and the first insulating film;
(e) forming a contact hole in the second insulating film;
(f) forming an anti-reflecting film over the second insulating film and in the contact hole such that the contact hole is filled with the anti-reflecting film;
(g) after the step (f), forming a photoresist film over the anti-reflecting film,
(h) after the step (g), by using the photoresist film as a mask, etching the anti-reflecting film and the second insulating film to form a second wiring trench in the second insulating film, wherein the anti-reflecting film is kept under the photoresist film and inside of the contact hole;
(i) after the step (h), removing the photoresist film and the anti-reflecting film; and
(j) after the step (i), forming a second wiring line and a plug in the second wiring trench and in the contact hole, wherein the second wiring line and the plug include a second conductive film comprised of a copper material as a main component, and wherein the second wiring line and the plug are formed as a dual damascene structure.
16. A method of manufacturing a semiconductor integrated circuit device according to claim 15 , further comprising:
a step of forming a barrier metal layer on the first wiring line between the steps (c) and (d).
17. A method of manufacturing a semiconductor integrated circuit device according to claim 16 ,
wherein the barrier metal layer is comprised of a tungsten film, a TiN, Ta, TaN, WN or Ni film.
18. A method of manufacturing a semiconductor integrated circuit device according to claim 15 ,
wherein the second insulating film is formed of an organic film.
19. A method of manufacturing a semiconductor integrated circuit device according to claim 15 ,
wherein the second insulating film is formed of a SiOF film.
20. A method of manufacturing a semiconductor integrated circuit device according to claim 15 ,
wherein the second insulating film includes a etching stopper film, and
wherein the second wiring trench is formed by using the etching stopper film in the step (h).
21. A method of manufacturing a semiconductor integrated circuit device according to claim 15 ,
wherein the second wiring trench is formed by controlling the etching time in the step (h).