IP Library Granted Patent US 7,564,117
Granted Patent B2
US 7,564,117 · App. 11/957,197 · Granted Jul 21, 2009

Bipolar transistor having variable value emitter ballast resistors

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Quick Facts
Patent No.
US 7,564,117
App. No.
11/957,197
Granted
Jul 21, 2009
Kind
B2
Abstract

Methods of forming and structures of a relatively large bipolar transistor is provided. The method includes forming a collector in a semiconductor region. Forming a base contiguous with a portion of the collector. Forming a plurality of emitters contiguous with portions of the base. Forming a common emitter interconnect and forming ballast emitter resistors for select emitters. Each ballast emitter resistor is coupled between an associated emitter and the common emitter interconnect. Each ballast resistor is further formed to have a selected resistance value. The selected resistance value of each ballast resistor is selected so the values of the ballast resistors vary in a two dimensional direction in relation to a working surface of the bipolar transistor.

Claims (34)

1. A method of forming a relatively large bipolar transistor, the method comprising:

forming a collector in a semiconductor region;

forming a base contiguous with a portion of the collector;

forming a plurality of emitters contiguous with portions of the base;

forming a common emitter interconnect; and

forming ballast emitter resistors for select emitters, each ballast emitter resistor coupled between an associated emitter and the common emitter interconnect, each ballast resistor is further formed to have a selected resistance value, wherein the selected resistance value of each ballast resistor is selected so the values of the ballast resistors vary in a two dimensional direction in relation to a working surface of the bipolar transistor.

2. The method of claim 1 , further comprising:

achieving relatively uniform operating temperature across the two dimensional direction by varying the values of the ballast resistors to increase forward second breakdown.

3. The method of claim 1 , wherein forming the base in the collector further comprises:

forming a plurality of base strips contiguous with the collector.

4. The method of claim 1 , wherein forming the ballast emitter resistors further comprise:

depositing a resistive material overlaying a dielectric layer.

5. The method of claim 1 , further comprising:

forming at least one collector contact in the collector, wherein each of the at least one collector contact is formed a select lateral distance from an associated emitter.

6. The method of claim 5 , wherein each ballast resistor is formed laterally between an associated emitter and an associated collector contact.

7. The method of claim 1 , further comprising:

forming the ballast resistors approximate an outer perimeter of the bipolar transistor to have a first select resistance value; and

forming the ballast resistors approximate a center of the bipolar transistor to have a second select resistance value, wherein the second select resistance value is larger than the first select resistance value.

8. The method of claim 7 , further comprising:

forming the ballast resistors positioned between the ballast resistors approximate the outer perimeter of the bipolar transistor and the ballast resistors approximate the center of the bipolar transistor to have resistance values between the first and second select resistance values.

9. A bipolar transistor comprising:

a base;

a collector;

a plurality of emitter sections coupled to an emitter common interconnect line; and

a plurality of ballast resistors for select emitter sections, each ballast resistor being coupled between the emitter common interconnect line and an associated emitter section, each ballast resistor having a selected resistance value, wherein the selected resistance value of each ballast resistor is selected so that the resistance value of the ballast resistors vary in a two dimensional direction in relation to a working surface of the bipolar transistor.

10. The bipolar transistor of claim 9 , wherein the resistance value of each ballast resistor is selected to achieve relatively uniform temperatures across a two dimensional lateral surface of the bipolar transistor.

11. The bipolar transistor of claim 9 , further comprising:

a common collector conductor; and

one or more collector contacts coupled between the collector and the common collector conductor.

12. The bipolar transistor of claim 9 , wherein the base is segmented into base strips, with each base strip coupled to a common base conductor.

13. The bipolar transistor of claim 9 , further comprising:

an outer boundary of the bipolar transistor.

14. The bipolar transistor of claim 13 , wherein the ballast resistors formed adjacent the outer boundary have relatively small resistance values as compared to ballast resistors formed adjacent a center location of the bipolar transistor.

15. The bipolar transistor of claim 14 , wherein the ballast resistors formed in a location between the outer boundary and the center location have a resistance value somewhere between the resistance value of the ballast resistors adjacent the outer boundary and the ballast resistors adjacent the center location.

Assignments (3)
CHANGE OF NAME Recorded Jun 10, 2014
From: INTERSIL AMERICAS INC.
To: INTERSIL AMERICAS LLC
Reel/Frame 033119/0484 →
SECURITY AGREEMENT Recorded Apr 30, 2010
From: INTERSIL CORPORATION; TECHWELL, INC.; INTERSIL COMMUNICATIONS, INC.; QUELLAN, INC.; ZILKER LABS, INC.; KENET, INC.; INTERSIL AMERICAS INC.; ELANTEC SEMICONDUCTOR, INC.; D2AUDIO CORPORATION; PLANET ATE, INC.
To: MORGAN STANLEY & CO. INCORPORATED
Reel/Frame 024320/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2009
From: BEASOM, JAMES D.
To: INTERSIL AMERICAS INC.
Reel/Frame 022837/0939 →