High efficiency digital power amplifier
View Patent ↗A digital power amplifier (or power switching amplifier or power switch) for use in a digital transmitter includes a low impedance multi-stage driver circuit having a low impedance pre-driver and a low impedance driver. The drive circuit drives a power switch stage having two power transistors configured in a current mode class-D push-pull configuration. Utilization of gallium nitride (GaN) transistors or pseudomorphic high electronic mobility transistors (pHEMT) (or combination thereof) and sizing the transistors progressively larger in the driver than in the pre-driver (at least about 3×) provides a reduction in output impedance of the driver circuit and progressive increases in the power driving capability of the succeeding stage. This allows the use of a power amplifier at higher frequencies without altering or affecting the power efficiency and allows use of a digital power amplifier for a digital transmitter.
1. A digital power amplifier comprising:
a differential amplifier adapted to receive and amplify a first digital modulated signal and a second digital modulated signal and generate a third digital modulated signal, the second digital modulated signal 180 degrees out of phase with the first digital modulated signal;
a pre-driver adapted to receive the third digital modulated signal and generate a pre-drive signal;
a driver coupled to the pre-driver and adapted to receive the pre-drive signal and generate a drive signal;
a power amplifier coupled to the driver and having at least one power transistor adapted to receive the drive signal and generate a power amplified digital signal for RF transmission via an antenna; and
wherein the pre-driver, driver and power amplifier collectively amplify the third digital modulated signal.
2. The digital power amplifier in accordance with claim 1 wherein the driver has an output impedance of about 5 ohms or less.
3. The digital power amplifier in accordance with claim 1 wherein the pre-driver comprises at least one transistor having a given output power driving capability and the driver comprises at least one transistor having a given output power driving capability greater than the output power driving capability of the pre-driver.
4. The digital power amplifier in accordance with claim 3 wherein the at least one transistor of the pre-driver and the at least one transistor of the driver are gallium nitride (GaN) transistors.
5. The digital power amplifier in accordance with claim 3 wherein the at least one transistor of the pre-driver and the at least one transistor of the driver are pseudomorphic high electronic mobility transistors (pHEMT).
6. The digital power amplifier in accordance with claim 1 wherein the pre-driver comprises a plurality of transistors having a given output power driving capability and the driver comprises a plurality of transistors having a given power driving capability greater than the output power driving capability of the pre-driver.
7. The digital power amplifier in accordance with claim 6 wherein the plurality of pre-driver transistors and the plurality of driver transistors are gallium nitride (GaN) transistors.
8. The digital power amplifier in accordance with claim 6 wherein the plurality of pre-driver transistors and the plurality of driver transistors are pseudomorphic high electronic mobility transistors (pHEMT).
9. The digital amplifier in accordance with claim 6 wherein the power amplifier is configured as a current mode class-D push-pull amplifier.
10. A digital power amplifier comprising:
a differential amplifier having two input terminals for receiving a first low voltage digital modulated signal and a second low voltage digital modulated signal and having two output terminals for outputting a first differential amplified digital modulated signal and a second differential amplified digital modulated signal;
a low impedance pre-driver circuit having two input terminals coupled to the two differential amplifier output terminals and having four output terminals for outputting a first pre-driver output signal, a second pre-driver output signal, a third pre-driver output signal and a fourth pre-driver output signal;
a low impedance driver having four input terminals respectively coupled to the four pre-driver output terminals and having two output terminals for outputting a first drive signal and a second drive signal;
a power amplifier comprising,
a first power transistor having a gate, a first source/drain and a second source/drain, the second source/drain coupled to a first voltage source VSS,
a second power transistor having a gate, a first source/drain and a second source/drain, the second source/drain coupled to the first voltage source VSS,
a first inductive element coupled to a second voltage source VDD and coupled to the first source/drain of the first power transistor, and
a second inductive element coupled to the second voltage source VDD and coupled to the first source/drain of the second power transistor; and
wherein the first source/drain of the first power transistor outputs an amplified version of the first digital modulated signal and the second source/drain of the second power transistor outputs an amplified version of the second digital modulated signal.
11. The digital power amplifier in accordance with claim 10 wherein the power amplifier is configured as a current mode class-D push-pull amplifier.
12. The digital power amplifier in accordance with claim 11 wherein the driver has an output impedance of about 5 ohms or less.
13. The digital power amplifier in accordance with claim 12 wherein the pre-driver comprises a plurality of transistors having a gate size X and the driver comprises a plurality of transistors having a gate size at least about 3×.
14. The digital power amplifier in accordance with claim 13 wherein the plurality of pre-driver transistors and the plurality of driver transistors are gallium nitride (GaN) transistors.
15. The digital power amplifier in accordance with claim 13 wherein the plurality of pre-driver transistors and the plurality of driver transistors are pseudomorphic high electronic mobility transistors (pHEMT).
16. A wireless communications device, comprising:
a digital transmitter comprising,
a digital upconverter adapted to generate a digital modulated signal, wherein the digital modulated signal comprises a first digital modulated signal and a second digital modulated signal, the second digital modulated signal 180 degrees out of phase with the first digital modulated signal; and
a digital power amplifier comprising,
a differential amplifier adapted to receive the first digital modulated signal and the second digital modulated signal and generate a differential pre-drive signal:
a pre-driver adapted to receive the differential pre-drive signal and generate a pre-drive signal,
a driver coupled to the pre-driver and adapted to receive the pre-drive signal and generate a drive signal,
a power amplifier coupled to the driver and having at least one power transistor adapted to receive the drive signal and generate a power amplified digital signal for RF transmission, and
wherein the pre-driver, driver and power amplifier collectively amplify the digital modulated signal; and
an antenna coupled to the digital power amplifier for transmitting the power amplified digital signal.
17. The wireless communication device in accordance with claim 16 wherein the pre-driver comprises a plurality of transistors having a gate size X and the driver comprises a plurality of transistors having a gate size at least about 3×
18. The wireless communication device in accordance with claim 17 wherein each of the plurality of pre-driver transistors and each of the plurality of driver transistors are a one of gallium nitride (GaN) transistor and pseudomorphic high electronic mobility transistor (pHEMT).