Receiver for amplitude-modulated signals
In a receiver, a synchronization circuit (MIX 2 , OSC, C 1 , R 1 ) provides a set of oscillator signals (OSI, OSQ) that are synchronized with a carrier of an amplitude-modulated signal. The set of oscillator signals (OSI, OSQ) comprises a quadrature oscillator signal (OSQ), which is substantially 90° phase shifted with respect to the carrier of the amplitude-modulated signal. A quadrature mixer (MIX 2 ) mixes the quadrature oscillator signal (OSQ) with the amplitude-modulated signal so as to obtain a quadrature mixer output signal (MO 2 a ). A phase-error corrector (PEC) adjusts the phase of the oscillator signals in response to a variation in the magnitude of an alternating current component (AC) in the quadrature mixer output signal (MO 2 a ).
1. A receiver comprising:
a synchronization circuit for providing a set of oscillator signals that are synchronized with a carrier of an amplitude-modulated signal, the set of oscillator signals comprising a quadrature signal, which is substantially 90° phase shifted with respect to the carrier of the amplitude-modulated signal;
a quadrature mixer for mixing the quadrature signal with the amplitude-modulated signal so as to obtain an output signal; and
a phase-error corrector for correcting the set of oscillator signals, by charging or discharging a capacitor to vary a tuning voltage, in response to a variation in magnitude of an alternating current component in the output signal.
2. The receiver as claimed in claim 1 , wherein said phase-error corrector applies a supplementary synchronization control signal to the synchronization circuit phase and adjusts the supplementary synchronization control signal in response to the variation in the magnitude of the alternating current component in the output signal.
3. The receiver according to claim 2 , the phase-error corrector further comprising:
a comparator arrangement for giving the supplementary synchronization control signal a polarity that depends on whether the alternating current component momentarily exceeds an upper level or is momentarily below a lower level.
4. A receiver comprising:
a synchronization circuit for providing a set of oscillator signals that are synchronized with a carrier of an amplitude-modulated signal, the set of oscillator signals comprising a quadrature signal, which is substantially 90° shifted with respect to the carrier of the amplitude-modulated signal;
a quadrature mixer for mixing the quadrature signal with the amplitude-modulated signal so as to obtain an output signal; and
a phase-error corrector for correcting the set of oscillator signals in response to a variation in magnitude of an alternating current component in the output signal, wherein the phase-error corrector comprises a controllable current source for providing output currents of opposite polarity and a comparator arrangement arranged to cause the controllable current source to provide a first output current during a time interval when the alternating current component exceeds an upper level and a second output current, which is of opposite polarity, during a time interval when the alternating current component is below a lower level.
5. The receiver according to claim 2 , the phase-error corrector further comprising:
a clock generator for providing a clock signal that defines respective control instants when the supplementary synchronization control signal can be adjusted;
a magnitude-variation detector for detecting whether the magnitude of the alternating current component has decreased or increased since a most recent control instant; and
an adjustment controller for adjusting the supplementary synchronization control signal in a direction a depending on whether the alternating current component has decreased or increased at the most recent control instant.
6. The receiver according to claim 5 , the phase-error corrector further comprising:
a control activation circuit for preventing the adjustment controller from adjusting the supplementary synchronization control signal when the magnitude of the alternating current component is below a threshold level.
7. The receiver according to claim 5 , the magnitude-variation detector further comprising:
an averaging unit that establishes an average of the magnitude of the alternating current component during a time interval when the clock signal has a high level, and during a subsequent time interval when the clock signal has a low level.
8. The receiver according to claim 5 , further comprising:
a television receiver for receiving a television signal that alternately comprises fields of opposite sign, the clock generator being arranged to cause the clock signal to have a low level during a field of one sign and a high level during a field of the opposite sign.
9. The receiver according to claim 1 , the quadrature mixer forming part of the synchronization circuit.
10. A method of correcting a phase error in a receiver, the method comprising:
providing a set of oscillator signals that are synchronized with a carrier of an amplitude-modulated signal, the set of oscillator signals comprising a quadrature signal, which is substantially 90° phase shifted with respect to the carrier of the amplitude-modulated signal;
mixing the quadrature signal with the amplitude-modulated signal so as to obtain an output signal; and
phase correcting said set of oscillator signals, by charging or discharging a capacitor to vary a tuning voltage, in response to a variation in magnitude of an alternating current component in the output signal.
11. An audiovisual system comprising: a receiver according to claim 1 ; and
an audiovisual rendering device for rendering a signal that the receiver has derived from a reception signal.
12. The receiver of claim 1 , further comprising:
a digital to analog converter that provides a phase error correction current.
13. The receiver of claim 12 , further comprising:
a counter, coupled to the digital to analog converter, wherein the phase error correction current is a function of a counter value in the counter.
14. The receiver of claim 1 , further comprising:
a synchronization slicer that receives a field synchronization signal and provides an odd/even field indicating signal.
15. The receiver of claim 1 , further comprising:
a rectifier that receives the alternating current component and provides a rectified alternating current component.
16. The receiver of claim 15 , further comprising:
a smoothing filter, coupled to the rectifier, that converts the rectified alternating current component into an alternating current magnitude indication.
17. The receiver of claim 1 , further comprising:
an even field capacitor that provides an even field magnitude indication; and
an odd field capacitor that provides an odd field magnitude indication.
18. The receiver of claim 17 , further comprising:
a comparator that compares the even field magnitude indication with the odd field magnitude indication.
19. The receiver of claim 1 , further comprising:
a biasing circuit that defines an average level on which the alternating current component is superposed.
20. The receiver of claim 1 , the quadrature mixer further comprising:
a phase detection mixer; and
a frequency conversion mixer.