IP Library Granted Patent US 7,893,472
Granted Patent B2
US 7,893,472 · App. 12/177,621 · Granted Feb 22, 2011

Ferroelectric memory device, ferroelectric memory manufacturing method, and semiconductor manufacturing method

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Quick Facts
Patent No.
US 7,893,472
App. No.
12/177,621
Granted
Feb 22, 2011
Kind
B2
Abstract

A ferroelectric memory device manufacturing method includes the steps of forming an interlayer isolating film for covering a transistor formed on a semiconductor substrate; forming a conductive plug in the interlayer insulating film to contact a diffusion region of the transistor formed on the semiconductor substrate; forming a ferroelectric capacitor including a lower electrode, a ferroelectric film and an upper electrode; and forming a compound film including silicon (Si) and a CH group on a surface of the interlayer insulating film and a surface of the conductive plug by depositing a Si compound containing Si atoms and the CH groups; wherein the compound film is formed after forming the conductive plug, and the compound film is formed before forming the lower electrode; and a self-orientation film is formed on a surface of the compound film.

Claims (24)

1. A ferroelectric memory device manufacturing method, comprising:

forming an interlayer isolating film for covering a transistor formed over a semiconductor substrate;

forming a conductive plug in the interlayer insulating film to contact a diffusion region of the transistor formed on the semiconductor substrate;

forming a ferroelectric capacitor over the conductive plug by stacking in the order of a lower electrode, a ferroelectric film and an upper electrode; and

forming a compound film including silicon (Si) and a CH group on a surface of the interlayer insulating film and a surface of the conductive plug by depositing an Si compound containing Si atoms and the CH groups after forming the conductive plug and before forming the lower electrode; and

forming a self-orientation film on a surface of the compound film.

2. The ferroelectric memory device manufacturing method as claimed in claim 1 , wherein the Si compound comprises hexamethyldisilazane.

3. The ferroelectric memory device manufacturing method as claimed in claim 1 , wherein the self-orientation film is formed at a temperature equal to or less than approximately 300° C.

4. The ferroelectric memory device manufacturing method as claimed in claim 3 , wherein the self-orientation film is formed of a Ti film using a sputtering technique.

5. A manufacturing method of a semiconductor device including a functional film, comprising:

forming an interlayer isolating film for covering a transistor formed over a semiconductor substrate;

forming a conductive plug in the interlayer insulating film to contact a diffusion region of the transistor formed on the semiconductor substrate;

forming a functional film over the conductive plug; and

forming a compound film including silicon (Si) and a CH group on a surface of the interlayer insulating film and a surface of the conductive plug by depositing an Si compound containing Si atoms and the CH groups after forming the conductive plug and before forming the functional film; and

forming a self-orientation film over a surface of the compound film.

6. A ferroelectric memory device, comprising:

a semiconductor substrate;

a transistor formed on the semiconductor substrate, the transistor including a first diffusion region and a second diffusion region;

an interlayer insulating film formed over the semiconductor substrate for covering the transistor;

a conductive plug formed in the interlayer insulating film to contact the first diffusion region; and

a ferroelectric capacitor formed over the interlayer insulating film, the ferroelectric capacitor contacting the conductive plug;

wherein the ferroelectric capacitor is inserted between an upper electrode and a lower electrode, the lower electrode being in electrical contact with the conductive plug;

a SiOC film is formed between the conductive plug and the lower electrode; and

a self-orientation film including a self-orientation material is formed in between the SiOC film and the lower electrode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR MEMORY SOLUTION LIMITED
Reel/Frame 053195/0249 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →