IP Library Granted Patent US 7,888,704
Granted Patent B2
US 7,888,704 · App. 12/222,746 · Granted Feb 15, 2011

Semiconductor device for electrostatic discharge protection

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Quick Facts
Patent No.
US 7,888,704
App. No.
12/222,746
Granted
Feb 15, 2011
Kind
B2
Abstract

A semiconductor device for electrostatic discharge protection is disclosed, and at least comprises a high-voltage parasite silicon controlled rectifier (HVSCR) and a diode. The HVSCR has an anode and a cathode, and the cathode of HVSCR is coupled to a ground. The diode, coupled to the HVSCR in series, also has an anode and a cathode. The anode of the diode is coupled to the anode of the HVSCR, and the cathode of the diode is coupled to a terminal applied with a positive voltage. The diode has a second conductivity type zone that could be constructed to form several strips or small blocks spaced apart from each other. Those small blocks could be any shapes and arranged regularly or randomly.

Claims (26)

1. A semiconductor device for electrostatic discharge protection, comprising:

a high-voltage parasitic silicon controlled rectifier (HVSCR), having an anode and a cathode, the cathode of HVSCR coupled to a ground; and

a diode, coupled to the HVSCR in series, and the diode having an anode and a cathode, the anode of the diode coupled to the anode of the HVSCR, and the cathode of the diode coupled to a terminal applied with a positive voltage.

2. The device according to claim 1 , wherein the HVSCR comprises:

a plurality of N-type and P-type doping regions, alternatively and contiguously formed within a first N-well.

3. The device according to claim 2 , wherein the HVSCR further comprises:

a P-type doping region disposed between two N-type doping regions, and three said doping regions being spaced from the first well and formed in a P-substrate, and said P-type doping region coupled to the ground.

4. The device according to claim 3 , wherein the diode comprises a P-type zone and a N-type doping region formed within a second N-well.

5. The device according to claim 4 , wherein the P-type zone of the diode is coupled to one of the N-type doping regions within the first well of the HVSCR.

6. The device according to claim 4 , wherein a N-type doping region is formed within the second N-well, and spaced apart from the P-type zone.

7. The device according to claim 6 , wherein the N-type doping region formed within the second N-well is connected to the terminal applied with the positive voltage.

8. The device according to claim 4 , wherein the P-type zone comprises a plurality of P-type strips spaced apart from each other, and the P-type strips are coupled together to one of the N-type doping regions in the first N-well.

9. The device according to claim 4 , wherein the P-type zone of the diode comprises a plurality of P-type small blocks spaced apart from each other, and the P-type small blocks are coupled together to one of the N-type doping regions in the first N-well.

10. The device according to claim 9 , wherein each of the P-type small blocks has a rectangular cross-section.

11. The device according to claim 9 , wherein each of the P-type small blocks has a rhombic cross-section.

12. The device according to claim 9 , wherein each of the P-type small blocks has a rounded cross-section.

13. The device according to claim 9 , wherein the P-type small blocks are arranged as a matrix.

14. The device according to claim 9 , wherein the P-type small blocks are arranged as a tessellated pattern.

15. The device according to claim 9 , wherein the P-type small blocks are arranged as a honeycombed-like pattern.

16. The device according to claim 9 , wherein the P-type small blocks are distributed as a cellular pattern.

17. The device according to claim 9 , wherein the P-type small blocks are arranged to form a plurality of columns in parallel.

18. The device according to claim 17 , wherein the P-type small blocks of each column are staggered to the blocks of adjacent column.

19. The device according to claim 17 , wherein the P-type small blocks of each column are adjoined to each other.

20. The device according to claim 17 , wherein the P-type small blocks of each column are apart from each other.

21. The device according to claim 2 , wherein the P-type doping regions within the first N-well of SCR are coupled to each other.

22. The device according to claim 3 , wherein the N-type doping regions of SCR outside the first N-well are coupled to each other.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded May 2, 2016
From: SYSTEM GENERAL CORP.
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038594/0168 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2008
From: CHIANG, CHIU-CHIH; TAI, HAN-CHUNG
To: SYSTEM GENERAL CORP.
Reel/Frame 021455/0211 →