IP Library Granted Patent US 7,800,112
Granted Patent B2
US 7,800,112 · App. 12/257,700 · Granted Sep 21, 2010

Semiconductor device comprising MIM capacitor

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 7,800,112
App. No.
12/257,700
Granted
Sep 21, 2010
Kind
B2
Abstract

A conductive film embedded in a predetermined region on an upper surface of an insulation film and metallic wirings embedded so as to penetrate through the conductive film and protrudes into the insulation film constitute a lower electrode of an MIM capacitor.

Claims (32)

1. A semiconductor device comprising:

a semiconductor substrate; and

an MIM capacitor, the MIM capacitor comprising:

a first insulation film provided on the semiconductor substrate;

a first conductive film made of a material of which a polishing rate is lower than the polishing rate of the first insulation film and embedded in a predetermined region of the first insulation film;

a plurality of grooves which penetrate through the first conductive film and reach the first insulation film;

metallic wirings embedded in the respective grooves so as to be in contact with the first conductive film;

a dielectric film provided on the metallic wirings and the first conductive film; and

a second conductive film provided on the dielectric film, wherein

the metallic wirings and the first conductive film constitute a lower electrode of the MIM capacitor,

the dielectric film constitutes a dielectric layer of the MIM capacitor, and

the second conductive film constitutes an upper electrode of the MIM capacitor.

2. The semiconductor device as claimed in claim 1 , wherein

a surface of the first conductive film and a surface of the metallic wirings are flush with a plane extended from a surface of the first insulation film.

3. The semiconductor device as claimed in claim 1 , wherein

the first conductive film is made of a material of which an etching selection ratio is higher than the etching selection ratio of the first insulation film.

4. The semiconductor device as claimed in claim 1 , wherein

the first insulation film comprises a lower insulation film and an upper insulation film,

the first conductive film is provided on the predetermined region of the lower insulation film, and

the upper insulation film is provided on a region other than the predetermined region of the lower insulation film.

5. The semiconductor device as claimed in claim 1 , wherein

a second insulation film is further provided on the first insulation film and the first conductive film,

the second insulation film has an opening above the metallic wirings, and

the dielectric film and the second conductive film are provided in the opening.

6. The semiconductor device as claimed in claim 5 , wherein

the second insulation film is made of silicon nitride or silicon nitride-oxide.

7. The semiconductor device as claimed in claim 1 , wherein

the dielectric film is made of silicon nitride or tantalum oxide.

8. The semiconductor device as claimed in claim 1 , wherein

the first conductive film is made of metal nitride including TaN or TiN.

9. The semiconductor device as claimed in claim 1 , wherein

the metallic wirings include copper or copper alloy as a main constituent thereof.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2009
From: OOTANI, ITARU; HAYASHI, SHINICHIRO; NISHIURA, SHINJI
To: PANASONIC CORPORATION
Reel/Frame 022061/0523 →
Priority Claims (1)
JP 2007-277300 · Oct 25, 2007 · national
Continuity (1)
Related Publication 20090108405A1 · Apr 30, 2009