Digital trimming in a microelectronic device
View Patent ↗Digital trimming logic is included in a microelectronic device of a type that produces an output signal in response to an input signal and a threshold signal. Trimming logic values are produced in response to a clock signal that is applied to the device in a trimming mode. The clock signal can be applied to a device pin that is used in normal operation to provide an output signal, thus allowing the pin to serve a dual function. The trimming logic changes the trimming logic value in response to the clock signal until the trimming logic value reaches a trim value at which the threshold signal is substantially equal to the input signal. The trimming logic then stores the trim value in a non-volatile memory and enters a locked mode in which further trimming is prevented and the device is ready for normal operation.
1. A method for trimming a microelectronic device having an output signal responsive to an input signal and a threshold signal, the microelectronic device having trimming logic and a trimming signal generator, the trimming signal generator producing a trimming signal in response to a trimming logic value generated by the trimming logic, the method comprising:
applying a clock signal to a pin of the microelectronic device associated with the output signal in normal operation;
the trimming logic changing the trimming logic value in response to the clock signal until the trimming logic value reaches a trim value at which the trimming signal causes the threshold signal and input signal to be substantially equal to each other;
storing the trim value in a non-volatile memory;
locking the trimming logic when the trimming logic value reaches the trim value; and
outputting the trim value from the non-volatile memory to the trimming signal generator while the trimming logic is locked.
2. The method claimed in claim 1 , wherein the trimming method is performed on a packaged microelectronic device.
3. The method claimed in claim 1 , further comprising:
inserting a semiconductor wafer into a probe-based test system;
applying a signal via a probe to initialize the trimming logic to an unlocked state.
4. The method claimed in claim 1 , wherein the microelectronic device is an opto-coupler having a light source and a light detector, and the method further comprises:
while applying the clock signal, applying an input signal having a level at a minimum necessary to turn the light source on.
5. A microelectronic device digitally trimmable in a trimming mode, comprising:
device circuitry, the device circuitry producing in a normal operational mode an output signal on a device output signal pin in response to an input signal and a threshold signal;
trimming logic, the trimming logic producing a trimming logic value in response to a clock signal received on the device output signal pin in trimming mode;
a trimming signal generator, the trimming signal generator producing a trimming signal in response to the trimming logic value, wherein the trimming logic changes the trimming logic value in response to the clock signal until the trimming logic value reaches a trim value at which trimming signal causes the threshold signal and input signal to be substantially equal to each other;
non-volatile memory, the non-volatile memory storing the trim value; and
trim output circuitry, the trim output circuitry outputting the trim value from the non-volatile memory to the trimming signal generator while the trimming logic is locked.
6. The microelectronic device claimed in claim 5 , wherein the device circuitry comprises:
a light source responsive to the input signal;
a light detector optically coupled to the light source to produce a detected input signal;
threshold circuitry for producing the threshold signal, wherein the trimming signal trims the threshold signal; and
a comparator for comparing the threshold signal with the detected input signal.
7. The microelectronic device claimed in claim 5 , wherein the trimming signal generator comprises a plurality of transistors, each transistor coupled to a bit of the trimming logic value.
8. The microelectronic device claimed in claim 5 , wherein the trim output circuitry comprises a selector having a selection input coupled to a selection bit output by the non-volatile memory.
9. The microelectronic device claimed in claim 8 , wherein:
the trim logic comprises a counter; and
the selector selectably couples one of an output of the counter and an output of the non-volatile memory to the trimming signal generator in response to the selection bit.
10. The microelectronic device claimed in claim 9 , wherein:
the non-volatile memory has a serial data input and parallel data output; and
the output of the counter is connected to the serial data input of the non-volatile memory.