Semiconductor connection component
View Patent ↗There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of a semiconductor device. A semiconductor chip includes a power transistor formation region to form a power transistor, a logic circuit formation region to form a logic circuit, and an analog circuit formation region to form an analog circuit. A pad is formed in the power transistor formation region. The pad and a lead are connected through a clip whose cross section is larger than that of a wire. On the other hand, a bonding pad is connected through the wire 29.
1. A semiconductor device manufacturing method comprising:
(a) mounting a semiconductor chip having a first region and a second region over a lead frame having a plurality of first leads and a plurality of second leads;
(b) forming a connection material over a first bonding pad and the first lead formed in the first region;
(c) electrically connecting the first bonding pad with the first lead via a clip;
(d) applying heat treatment to the semiconductor chip; and
(e) after the step (d), electrically connecting a second bonding pad with the second lead formed in the second region via a wire.
2. The semiconductor device manufacturing method according to claim 1 ,
wherein a cross section of the clip is larger than a cross section of the wire.
3. The semiconductor device manufacturing method according to claim 1 ,
wherein an area of the first bonding pad is larger than an area of the second bonding pad.
4. The semiconductor device manufacturing method according to claim 1 ,
wherein a power transistor is formed immediately below the first bonding pad.
5. The semiconductor device manufacturing method according to claim 1 ,
wherein the connection material is selectable from solder and resin paste.
6. The semiconductor device manufacturing method according to claim 1 ,
wherein the first region is a power transistor formation region and the second region is a control integrated circuit formation region.
7. A semiconductor device manufacturing method comprising:
(a) mounting a semiconductor chip having a first region and a second region over a lead frame having a plurality of first leads and a plurality of second leads;
(b) electrically connecting a second bonding pad and the second lead formed in the second region via a wire;
(c) forming a connection material over the first bonding pad and the first lead formed over the first region after the step (b);
(d) electrically connecting the first bonding pad and the first lead via a wire; and
(e) applying heat treatment to the semiconductor chip.