COMPUTER EMULATOR EMPLOYING DIRECT EXECUTION OF COMPILED FUNCTIONS
An emulation system that provides the functionality of an emulated computer on a host computer pre-processes the object code file to be emulated to reduce the run-time overhead due to parsing the object code. The emulator uses pre-programmed functions that model each instruction of the emulated computer. An object code file is pre-parsed to generate a translated file which includes a sequence of function calls corresponding to the sequence of instructions in the code file. The translated file is compiled to generate a corresponding translated object-code file. The translated object-code file is executed in the emulation environment on the host computer. The emulation system also includes a standard mode in which the object code file is emulated by sequentially parsing each instruction in the object code file and invoking an appropriate one of the preprogrammed functions in the emulated environment.
1 . A system for emulating the functionality of an emulated computer on a host computer, the system comprising:
an object-code segment, written for an emulated computer, which is to be run on the host computer;
system memory; and,
a processor emulator program, the processor emulator program running on the host computer and facilitating the emulation of the emulated computer on the host computer, the processor emulator program comprising an opcode emulator, the opcode emulator pre-processing the object-code segment prior to run-time to determine whether the object-code segment comprises instructions directly supported by the host computer and, if the object-code segment comprises instructions not directly supported by the host computer, providing an equivalent high level translated instruction therefor and compiling the high level translated instruction into corresponding object-code instructions suitable for execution on the host computer.
2 . The system of claim 1 , the processor emulator program directly executing the object-code instructions produced by the opcode emulator during run-time, and executing each segment comprised of an unmodified object-code instruction of the emulated computer by sequentially parsing each such instruction and invoking a corresponding preprogrammed emulation function provided on the host computer.
3 . The system of claim 2 , the processor emulator program determining, during runtime, whether at least one interrupt is pending and, if at least one interrupt is pending, invoking an interrupt handler to process the interrupt.
4 . The system of claim 2 , the opcode emulator placing a mark in each translated object-code instruction such that the translated object-code instructions can be identified.
5 . The system of claim 4 , the processor emulator program her maintaining a segment address pointing to an address of the next segment when a segment having an unmodified instruction is executed; maintaining an entry point address pointing to a next function to be executed when a segment having a translated instruction is executed; and, translating between the entry point address and the segment address in response to a transition between executing a segment having an unmodified instruction and executing a segment containing a translated instruction.
6 . The system of claim 5 further comprising a library routine, the library routine comprising a switch statement that comprises a sequence of calls to ones of the functions corresponding to the object-code instructions and the individual calls to the functions in the switch statement having addresses corresponding to the entry point address of the respective instruction in the corresponding plurality of object-code instructions.
7 . The system of claim 6 , the opcode emulator embedding the translated instructions in the library routine.
8 . The system of claim 7 , the library routine comprising a dynamically linked library file.
9 . The system of claim 8 , the opcode emulator causing the high level translated instructions in the segments to become functions in the dynamically linked library file which emulate the corresponding object-code instructions of the emulated computer.
10 . The system according to claim 9 , the functions in the dynamically linked library comprising case statements in a programming language switch statement, each case statement being addressed by its corresponding address in the object-code file of the emulated computer so as to allow both translated and unmodified object-code instructions to be executed by the same corresponding preprogrammed emulated functions provided on the host computer.
11 . The system of claim 1 , further comprising an I/O emulator.
12 . The system of claim 1 , further comprising at least one memory data structure.
13 . A tangible computer-readable carrier having instructions stored thereon, the instructions, when executed by a processor, cause the processor to:
divide object-code instructions of an emulated computer into a plurality of segments, each segment comprising either an unmodified object-code instruction of the emulated computer or an equivalent high level translated instruction which has been generated by pre-parsing the corresponding object-code instruction of the emulated computer prior to run-time;
execute each segment comprised of an unmodified object-code instruction of the emulated computer on a host computer by sequentially parsing teach such instruction and invoke a corresponding preprogrammed emulation fiction provided on the host computer;
execute each segment comprised of a high level translated instruction by:
compiling the high level translated instruction into corresponding object-code instructions suitable for execution on the host computer; and,
directly executing the corresponding object-code instructions produced by the compiling on the host computer.
14 . A method according to claim 13 including determining if at least one interrupt is pending and, if at least one interrupt is pending, invoking an interrupt handler to process the interrupt.
15 . A method according to claim 13 , a mark being placed in each segment for indicating that the segment contains a translated instruction.
16 . A method according to claim 13 , further comprising:
maintaining a segment address pointing to an address of the next segment when a segment having an unmodified instruction is executed;
maintaining an entry point address pointing to a next function to be executed when a segment having a translated instruction is executed; and,
translating between the entry point address and the segment address in response to a transition between executing a segment having an unmodified instruction and executing a segment containing a translated instruction.
17 . A method according to claim 16 , further comprising embedding the translated instructions in a library routine, wherein the library routine includes a switch statement that comprises a sequence of calls to ones of the functions corresponding to the object-code instructions and wherein the individual calls to the functions in the switch statement have addresses corresponding to the entry point address of the respective instruction in the corresponding plurality of object-code instructions.
18 . A method according to claim 17 , the library routines being provided in a dynamically linked library file, and wherein the high level translated instructions in the segments become functions in the dynamically linked library file which emulate the corresponding object-code instructions of the emulated computer.
19 . A method according to claim 18 , the functions in the dynamically linked library file are case statements in a programming language switch statement, each case statement being addressed by its corresponding address in the object-code file of the emulated computer so as to allow both translated and unmodified object-code instructions to be executed by the same corresponding preprogrammed emulated functions provided on the host computer.