Imaging apparatus

1. An imaging apparatus comprising:

a lens for collecting light incident from outside;

a solid-state imaging device having on its top surface

an imaging area in which pixels for converting the incident light to a signal are two-dimensionally arranged in a row direction and a column direction,

a vertical scanning circuit, located adjacent to the imaging area in the row direction, for selecting the pixels from which the signal is read on a row by row basis,

a peripheral circuit for processing the signal read from the imaging area, and

a plurality of terminals including a signal terminal for outputting the signal; and

a prism, placed directly on the imaging area, for bending an optical axis of the incident light that has passed through the lens and leading the incident light to the imaging area, wherein

the peripheral circuit lies in a first direction from the imaging area, the first direction being one of opposite directions from the imaging area along the column direction, and the plurality of terminals lie in the first direction from the peripheral circuit, and

an optical axis of the lens and the first direction are parallel to each other.

2. The imaging apparatus of claim 1 , further comprising:

a processor for outputting light whose brightness is varied according to a magnitude of the signal output from the solid-state imaging device; and

a light transmitting member for emitting the light output from the processor to the outside.

3. The imaging apparatus of claim 1 , wherein the vertical scanning circuit includes one shift register and a logic circuit provided for each row of the pixels for receiving an output of the shift register.

4. The imaging apparatus of claim 1 ,

wherein each of the pixels includes:

a light-receiving part for converting the incident light to the signal;

a first transistor for transferring charge accumulated in the light-receiving part to a detection section;

a second transistor for amplifying the signal transferred to the detection section; and

a third transistor for resetting charge in the detection section, and

the solid-state imaging device further includes a power supply line for supplying a supply voltage that is supplied from outside of the solid-state imaging device, to drains of the second transistor and the third transistor directly or indirectly from a power supply terminal of the plurality of terminals, and

a control circuit for supplying a control signal to the vertical scanning circuit, the horizontal scanning circuit and the power supply line.

5. The imaging apparatus of claim 1 , wherein the peripheral circuit includes a column ADC provided for each column of the pixels for carrying out an analog/digital conversion of the signal read from the pixels.

6. The imaging apparatus of claim 1 , wherein the peripheral circuit includes:

a PS conversion circuit for converting the signal read in parallel from each row of the pixels into a serial signal;

a horizontal scanning circuit for selecting the signal that is output from the pixels and sequentially outputting the signal from the signal terminal; and

a timing generator for supplying a control signal to the vertical scanning circuit, the horizontal scanning circuit and the power supply line.

7. An imaging apparatus comprising:

a solid-state imaging device having on its top surface

an imaging area in which pixels for converting incident light to a signal are two-dimensionally arranged in a row direction and a column direction, and

a vertical scanning circuit, located adjacent to the imaging area in the row direction, for selecting the pixels from which the signal is read on a row by row basis;

a prism, placed directly on the imaging area, for bending an optical axis of the incident light and leading the incident light to the imaging area;

a column ADC, provided for each column of the pixels, for carrying out an analog/digital conversion of the signal read from the pixels;

a PS conversion circuit for converting the signal read in parallel from each row of the pixels into a serial signal;

a horizontal scanning circuit for selecting the signal that is output from the pixels and sequentially outputting the signal from a signal terminal;

a timing generator for supplying a control signal to the vertical scanning circuit and the horizontal scanning circuit; and

one or more semiconductor chips positioned or stacked in a region on the solid-state imaging device that lies in a first direction from the imaging area, the first direction being one of opposite directions from the imaging area along the column direction, wherein

the column ADC, the PS conversion circuit, the horizontal scanning circuit, and the timing generator are placed separately on the one or more semiconductor chips and at the region on the solid-state imaging device that lies in the first direction from the imaging area.