IP Library Granted Patent US 7,759,730
Granted Patent B2
US 7,759,730 · App. 12/463,962 · Granted Jul 20, 2010

Semiconductor device and method of manufacturing the same

Assignee: Renesas Technology Corp.
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Quick Facts
Patent No.
US 7,759,730
App. No.
12/463,962
Granted
Jul 20, 2010
Kind
B2
Abstract

A gate trench 13 is formed in a semiconductor substrate 10 . The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14 . A portion of the gate electrode 16 protrudes from the semiconductor substrate 10 , and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16 . A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25 . A plug 34 is formed using an SAC technique.

Claims (25)

1. A semiconductor device comprising:

(a) a semiconductor substrate of a first conductivity type;

(b) a gate trench formed in a main surface of the semiconductor substrate;

(c) a gate insulating film formed over an inner wall and a bottom portion of the gate trench;

(d) a gate electrode formed so as to fill the gate trench and a portion of which protrudes from the semiconductor substrate;

(e) a sidewall formed over a side wall portion of the gate electrode protruding from the semiconductor substrate;

(f) a source region of the first conductivity type, formed so as to be adjacent to the gate electrode;

(g) a body trench formed between the sidewalls formed on adjacent gate electrodes by self-alignment with the gate electrodes, so as to be deeper than a depth of the source region;

(h) a first semiconductor region formed at a bottom portion of the body trench and having a second conductivity type that is different from the first conductivity type;

(i) a drain region of the first conductivity type, formed in an opposite surface to the main surface of the semiconductor substrate; and

(j) a first metal silicide film formed over the gate electrode, the source region, and the first semiconductor region, wherein the source region and the first semiconductor region are electrically coupled to each other by the first metal silicide film.

2. The semiconductor device according to claim 1 , wherein the height of an uppermost portion of the sidewall is higher than the height of an uppermost portion of the gate electrode.

3. The semiconductor device according to claim 1 , wherein: a Schottky barrier diode is formed over the semiconductor substrate; the Schottky barrier diode has a junction formed by the semiconductor substrate and a second metal silicide film formed over the semiconductor substrate; and the second metal silicide film and the first metal silicide film are formed at the same time.

4. The semiconductor device according to claim 3 , wherein: the Schottky barrier diode has a junction groove formed in the semiconductor substrate; and the second metal silicide film is formed in the junction groove.

5. A semiconductor device comprising:

(a) a semiconductor substrate of a first conductivity type;

(b) a gate trench formed in a main surface of the semiconductor substrate;

(c) a gate insulating film formed over an inner wall and a bottom portion of the gate trench;

(d) a gate electrode formed so as to fill the gate trench and a portion of which protrudes from the semiconductor substrate;

(e) a first source region of the first conductivity type, formed so as to be adjacent to the gate electrode;

(f) a sidewall formed over a side wall portion of the gate electrode protruding from the semiconductor substrate;

(g) a second source region of the first conductivity type, formed so as to be adjacent to the first source region;

(h) a body trench formed between the sidewalls formed on adjacent gate electrodes by self-alignment with the gate electrodes, so as to be deeper than a depth of the second source region;

(i) a first semiconductor region formed at a bottom portion of the body trench and having a second conductivity type that is different from the first conductivity type; and

(j) a drain region of the first conductivity type, formed in an opposite surface to the main surface of the semiconductor substrate, wherein the first source region is formed in a region shallower than the second source region.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Aug 13, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024864/0635 →
MERGER Recorded Aug 13, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0190 →
Priority Claims (1)
JP 2006-216659 · Aug 9, 2006 · national
Continuity (2)
Division 1183657400 · Aug 9, 2007
Related Publication 20090224315A1 · Sep 10, 2009