Manufacturing method of semiconductor device
After a first via hole leading to a ferroelectric capacitor structure are formed in an interlayer insulating film by dry etching, a second via hole to expose part of the ferroelectric capacitor structure is formed in a hydrogen diffusion preventing film so as to be aligned with the first via hole by wet etching, and a via hole constructed by the first via hole and the second via hole communicating with each other is formed.
1. A manufacturing method of a semiconductor device, comprising:
forming a capacitor structure, which is constructed by sandwiching a capacitor film made of a ferroelectric between a lower electrode and an upper electrode, above a semiconductor substrate;
forming a hydrogen diffusion preventing film so that the capacitor structure is covered therewith;
forming an interlayer insulating film which covers the capacitor structure with the hydrogen diffusion preventing film therebetween; and
forming an opening in the interlayer insulating film and the hydrogen diffusion preventing film so that at least part of the capacitor structure is exposed in order to perform wiring connection of the capacitor structure, wherein
said process of forming the opening includes:
a first process of forming a first opening in the interlayer insulating film by dry etching until a part of a surface of the hydrogen diffusion preventing film is exposed; and
a second process of forming a second opening in a portion of the hydrogen diffusion preventing film aligned with the first opening by wet etching,
the opening constructed by the first opening and the second opening communicating with each other is formed.
2. The manufacturing method of the semiconductor device according to claim 1 , wherein the hydrogen diffusion preventing film is made of at least one kind of material selected from the group consisting of Al 2 O 3 (alumina), Al nitrogen oxide, Ta oxide, and Ti oxide.
3. The manufacturing method of semiconductor device according to claim 1 , wherein the capacitor structure is of a planar type in which continuity is obtained on the lower electrode and on the upper electrode, respectively.
4. The manufacturing method of the semiconductor device according to claim 3 , wherein in forming the opening, the opening to expose part of a surface of the lower electrode and the opening to expose part of a surface of the upper electrode are formed in the same process.
5. The manufacturing method of the semiconductor device according to claim 1 , wherein the upper electrode includes a noble metal film in its uppermost layer.
6. The manufacturing method of the semiconductor device according to claim 5 , wherein the noble metal film is made of Pt (platinum) or Ir (iridium).
7. The manufacturing method of the semiconductor device according to claim 1 , wherein the wet etching is performed using a chemical containing ammonium fluoride, amide, organic acid, organic acid salts, and water.
8. The manufacturing method of the semiconductor device according to claim 7 , wherein in the chemical, the concentration of the ammonium fluoride is not less than 1.0% and not more than 4.5%.
9. The manufacturing method of the semiconductor device according to claim 1 , wherein the wet etching is performed using a chemical containing ammonium fluoride, glycol ether, amide, and water.
10. The manufacturing method of the semiconductor device according to claim 9 , wherein in the chemical, the concentration of the ammonium fluoride is not less than 0.03% and not more than 4.5%.