IP Library Granted Patent US 8,443,242
Granted Patent B2
US 8,443,242 · App. 12/595,959 · Granted May 14, 2013

Systems and methods for multiple coding rates in flash devices

Inventors: Hanan Weingarten (Herzelia, IL); Michael Katz (Haifa, IL)
Assignee: Densbits Technologies Ltd.
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Quick Facts
Patent No.
US 8,443,242
App. No.
12/595,959
Granted
May 14, 2013
Kind
B2
Abstract

A system and method for encoding information arriving from a host in order to store the coded information in flash memory, the method comprising encoding information arriving from a host for storage at a flash memory location including generating a number of redundancy bytes, the encoding proceeding at an encoding rate which is a function of the number of redundancy bytes generated, the encoding including determining an effective error rate, including an anticipated rate of expected reading errors, for the flash memory location; and selecting the encoding rate as a function of the effective error rate such that the number of redundancy bytes is sufficient to overcome the anticipated rate of expected reading errors with a predetermined degree of certainty.

Claims (20)

1. A method for encoding information arriving from a host in order to store said coded information in flash memory, the method comprising:

encoding information arriving from a host for storage at a flash memory location including generating a number of redundancy bytes, the encoding proceeding at an encoding rate which is a function of the number of redundancy bytes to be generated, said encoding including:

determining an effective error rate, including an anticipated rate of expected reading errors, for the flash memory location; and

selecting the encoding rate as a function of said effective error rate such that said number of redundancy bytes is sufficient to overcome said anticipated rate of expected reading errors with a predetermined degree of certainty.

2. The method according to claim 1 wherein said flash memory location comprises a page.

3. The method according to claim 1 wherein said determining comprises determining a rate of expected reading errors assuming reading occurs after a time period T, based on known data on frequency of errors when information is read from a flash memory which has undergone a simulation of effects of passage of said time period T.

4. The method according to claim 1 wherein said determining comprises reading a stored effective error rate, identifying a time t at which said effective error rate was stored, and updating said effective error rate as a function of said stored effective error rate and said time, to take into account spontaneous recovery of the flash memory location, over time, from effects of some of the program cycles to which the flash memory location has been subjected.

5. The method according to claim 4 wherein said updating comprises finding, for at least one stored number of program cycles to which the flash memory location was subjected at time t, a number of program cycles to which the flash memory location is subjected currently, after which the rate of errors currently read from said flash memory location equals the rate of errors currently read from said flash memory location which was subjected to said stored number of program cycles at time t.

6. A method according to claim 4 wherein said identifying a time t at which said effective error rate was stored, comprises associating a timer with said flash memory location, capable of generating a time stamp each time an operation is performed upon said flash memory location and storing at least one said time stamp.

7. A method according to claim 6 wherein said operation comprises a flash memory location reading operation.

8. A method according to claim 4 wherein said identifying a time t at which said effective error rate was stored comprises reading said flash memory location including quantifying and correcting errors encountered, and estimating the time of last programming as a function of said quantification of errors encountered.

9. The method according to claim 1 wherein said flash memory device comprises an NROM flash memory device.

10. A method according to claim 1 wherein said effective error rate for an individual flash memory location is stored adjacent said individual flash memory location.

11. A method according to claim 10 wherein said flash memory location comprises a page and said effective error rate for said page is stored within said page.

12. A method according to claim 11 wherein said effective error rate is encoded at a fixed coding rate corresponding to a fixed number of redundancy bytes which is high enough to overcome expected corruptions of said effective error rate.

13. A method according to claim 1 wherein said encoding, determining and selecting are performed for a plurality of flash memory locations.

14. A system for encoding information arriving from a host in order to store said coded information in flash memory, the system comprising:

a variable rate encoder operative to encode information arriving from a host for storage at a flash memory location including generating a number of redundancy bytes, the encoding proceeding at an encoding rate which is a function of the number of redundancy bytes generated, said variable rate encoder including:

an error rate definer operative to determine an effective error rate, including an anticipated rate of expected reading errors, for the flash memory location; and

an encoding rate definer selecting the encoding rate as a function of said effective error rate such that said number of redundancy bytes is sufficient to overcome said anticipated rate of expected reading errors with a predetermined degree of certainty.

Assignments (9)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
RELEASE OF SECURITY INTEREST Recorded Jan 11, 2017
From: KREOS CAPITAL IV (EXPERT FUND) LIMITED
To: DENSBITS TECHNOLOGIES LTD.
Reel/Frame 041339/0921 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2016
From: DENSBITS TECHNOLOGIES LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037622/0224 →
SECURITY INTEREST Recorded Mar 18, 2015
From: DENSBITS TECHNOLOGIES LTD.
To: KREOS CAPITAL IV (EXPERT FUND) LIMITED
Reel/Frame 035222/0547 →
SECURITY INTEREST Recorded Jul 30, 2014
From: DENSBITS TECHNOLOGIES LTD.
To: KREOS CAPITAL IV (EXPERT FUND) LIMITED
Reel/Frame 033444/0628 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2011
From: WEINGARTEN, HANAN; KATZ, MICHAEL
To: DENSBITS TECHNOLOGIES LTD.
Reel/Frame 025658/0543 →
Continuity (8)
Provisional Application 60996027 · Oct 25, 2007
Provisional Application 60996782 · Dec 5, 2007
Provisional Application 61006805 · Jan 31, 2008
Provisional Application 61064853 · Mar 31, 2008
Provisional Application 61071465 · Apr 30, 2008
Provisional Application 61071466 · Apr 30, 2008
Provisional Application 61129608 · Jul 8, 2008
Related Publication 20100088557A1 · Apr 8, 2010