Constant-voltage generating circuit and regulator circuit

1. A constant-voltage generating circuit comprising:

a reference potential generating unit which outputs a prescribed first potential that varies with a positive or negative temperature dependence in accordance with a potential on an output line, and a second potential that varies with an opposite temperature dependence to the positive or negative temperature dependence with respect to the potential on the output line;

a first amplifier unit which takes the first potential and the second potential as two inputs, and whose output is connected to the output line during a first operation period;

a second amplifier unit which takes the first potential and the second potential as two inputs, and whose output is connected to the output line during a second operation period; and

a low-pass filter connected to the output line, and wherein

the first operation period and the second operation period are repeated, one alternating with the other,

the first amplifier unit stores offset voltage of the first amplifier unit during the second operation period, and produces an output, during the first operation period, that brings the first potential and the second potential equal to each other by canceling out the offset voltage using the stored offset voltage, and

the second amplifier unit stores offset voltage of the second amplifier unit during the first operation period, and produces an output, during the second operation period, that brings the first potential and the second potential equal to each other by canceling out the offset voltage using the stored offset voltage.

2. The constant-voltage generating circuit according to claim 1 , wherein the reference potential generating unit comprises:

a first pnp transistor and a first resistor connected in series between a ground terminal and the output line; and

a second pnp transistor and second and third resistors connected in series between the ground terminal and the output line, and wherein

the first potential is output from a connection node between the first pnp transistor and the first resistor, and

the second potential is output from a connection node between the second and third resistors.

3. The constant-voltage generating circuit according to claim 1 , wherein

the first amplifier unit comprises a first CMOS operational amplifier whose positive input is connected to an input node of the first potential, a first offset capacitor whose one end is connected to an negative input of the first operational amplifier, a first switch connected between the other end of the first offset capacitor and an input node of the second potential, a second switch connected between the other end of the first offset capacitor and the input node of the first potential, a third switch connected between the negative input of the first operational amplifier and an output thereof, and a fourth switch connected between the output of the first operational amplifier and the output line, and

the second amplifier unit comprises a second CMOS operational amplifier whose positive input is connected to the input node of the first potential, a second offset capacitor whose one end is connected to an negative input of the second operational amplifier, a fifth switch connected between the other end of the second offset capacitor and the input node of the second potential, a sixth switch connected between the other end of the second offset capacitor and the input node of the first potential, a seventh switch connected between the negative input of the second operational amplifier and an output thereof, and an eighth switch connected between the output of the second operational amplifier and the output line.

4. The constant-voltage generating circuit according to claim 2 , wherein

the first amplifier unit comprises a first CMOS operational amplifier whose positive input is connected to an input node of the first potential, a first offset capacitor whose one end is connected to an negative input of the first operational amplifier, a first switch connected between the other end of the first offset capacitor and an input node of the second potential, a second switch connected between the other end of the first offset capacitor and the input node of the first potential, a third switch connected between the negative input of the first operational amplifier and an output thereof, and a fourth switch connected between the output of the first operational amplifier and the output line, and

the second amplifier unit comprises a second CMOS operational amplifier whose positive input is connected to the input node of the first potential, a second offset capacitor whose one end is connected to an negative input of the second operational amplifier, a fifth switch connected between the other end of the second offset capacitor and the input node of the second potential, a sixth switch connected between the other end of the second offset capacitor and the input node of the first potential, a seventh switch connected between the negative input of the second operational amplifier and an output thereof, and an eighth switch connected between the output of the second operational amplifier and the output line.

5. The constant-voltage generating circuit according to claim 1 , wherein

the first amplifier unit includes a first phase compensation capacitor and a second phase compensation capacitor, and

the second amplifier unit includes a third phase compensation capacitor and a fourth phase compensation capacitor, and wherein

the first amplifier unit connects the first phase compensation capacitor to the output and disconnects the second phase compensation capacitor from the output during the first operation period, and connects the second phase compensation capacitor to the output and disconnects the first phase compensation capacitor from the output during the second operation period, and

the second amplifier unit connects the third phase compensation capacitor to the output and disconnects the fourth phase compensation capacitor from the output during the first operation period, and connects the fourth phase compensation capacitor to the output and disconnects the third phase compensation capacitor from the output during the second operation period.

6. The constant-voltage generating circuit according to claim 2 , wherein

the first amplifier unit includes a first phase compensation capacitor and a second phase compensation capacitor, and

the second amplifier unit includes a third phase compensation capacitor and a fourth phase compensation capacitor, and wherein

the first amplifier unit connects the first phase compensation capacitor to the output and disconnects the second phase compensation capacitor from the output during the first operation period, and connects the second phase compensation capacitor to the output and disconnects the first phase compensation capacitor from the output during the second operation period, and

the second amplifier unit connects the third phase compensation capacitor to the output and disconnects the fourth phase compensation capacitor from the output during the first operation period, and connects the fourth phase compensation capacitor to the output and disconnects the third phase compensation capacitor from the output during the second operation period.

7. The constant-voltage generating circuit according to claim 3 , wherein

the first amplifier unit includes a first phase compensation capacitor and a second phase compensation capacitor, and

the second amplifier unit includes a third phase compensation capacitor and a fourth phase compensation capacitor, and wherein

the first amplifier unit connects the first phase compensation capacitor to the output and disconnects the second phase compensation capacitor from the output during the first operation period, and connects the second phase compensation capacitor to the output and disconnects the first phase compensation capacitor from the output during the second operation period, and

the second amplifier unit connects the third phase compensation capacitor to the output and disconnects the fourth phase compensation capacitor from the output during the first operation period, and connects the fourth phase compensation capacitor to the output and disconnects the third phase compensation capacitor from the output during the second operation period.

8. The constant-voltage generating circuit according to claim 4 , wherein

the first amplifier unit includes a first phase compensation capacitor and a second phase compensation capacitor, and

the second amplifier unit includes a third phase compensation capacitor and a fourth phase compensation capacitor, and wherein

the first amplifier unit connects the first phase compensation capacitor to the output and disconnects the second phase compensation capacitor from the output during the first operation period, and connects the second phase compensation capacitor to the output and disconnects the first phase compensation capacitor from the output during the second operation period, and

the second amplifier unit connects the third phase compensation capacitor to the output and disconnects the fourth phase compensation capacitor from the output during the first operation period, and connects the fourth phase compensation capacitor to the output and disconnects the third phase compensation capacitor from the output during the second operation period.

9. The constant-voltage generating circuit according to claim 1 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

10. The constant-voltage generating circuit according to claim 2 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

11. The constant-voltage generating circuit according to claim 3 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

12. The constant-voltage generating circuit according to claim 4 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

13. The constant-voltage generating circuit according to claim 5 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

14. The constant-voltage generating circuit according to claim 6 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

15. The constant-voltage generating circuit according to claim 7 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

16. The constant-voltage generating circuit according to claim 8 , further comprising a switch provided between the output line and the low-pass filter, and wherein

the switch is turned off for a predetermined period of time in an early stage of each of the first and second operation periods.

17. The constant-voltage generating circuit according to claim 3 , wherein

the first amplifier unit includes a ninth switch provided in parallel with the first offset capacitor, and wherein

for a predetermined time after power on, the ninth switch is turned on, and only the first amplifier unit is operated, while the second amplifier unit is held in an inoperative condition, and

when the predetermined time has elapsed, the ninth switch is turned off, and the operation alternating between the first operation period and the second operation period is started.

18. The constant-voltage generating circuit according to claim 4 , wherein

the first amplifier unit includes a ninth switch provided in parallel with the first offset capacitor, and wherein

for a predetermined time after power on, the ninth switch is turned on, and only the first amplifier unit is operated, while the second amplifier unit is held in an inoperative condition, and

when the predetermined time has elapsed, the ninth switch is turned off, and the operation alternating between the first operation period and the second operation period is started.

19. A regulator circuit comprising a constant-voltage generating circuit for generating a reference voltage, an error amplifier, an output transistor controlled by an output of the error amplifier, and a resistive voltage-dividing circuit for dividing a regulator output voltage, wherein the error amplifier performs negative feedback control by comparing the voltage divided by the resistive voltage-dividing circuit with the reference voltage, and wherein

the constant-voltage generating circuit is a constant-voltage generating circuit comprising:

a reference potential generating unit which outputs a prescribed first potential that varies with a positive or negative temperature dependence in accordance with a potential on an output line, and a second potential that varies with an opposite temperature dependence to the positive or negative temperature dependence with respect to the potential on the output line;

a first amplifier unit which takes the first potential and the second potential as two inputs, and whose output is connected to the output line during a first operation period;

a second amplifier unit which takes the first potential and the second potential as two inputs, and whose output is connected to the output line during a second operation period; and

a low-pass filter connected to the output line, and wherein

the first operation period and the second operation period are repeated, one alternating with the other,

the first amplifier unit stores offset voltage of the first amplifier unit during the second operation period, and produces an output, during the first operation period, that brings the first potential and the second potential equal to each other by canceling out the offset voltage using the stored offset voltage, and

the second amplifier unit stores offset voltage of the second amplifier unit during the first operation period, and produces an output, during the second operation period, that brings the first potential and the second potential equal to each other by canceling out the offset voltage using the stored offset voltage.