Amplifier and switched capacitor amplifier circuit
View Patent ↗An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (C s , C f ) includes a capacitor for frequency compensation (CC 1 ) that is connected in parallel to an amplifier stage (V 2 ). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC 2 ) is selectively connected in parallel to the first capacitor for frequency compensation (CC 1 ) via a switch controlled by a capacitor switching signal (clk).
1. An amplifier for an amplifier circuit having a switched capacitor circuit, comprising:
a first capacitor for frequency compensation connected in parallel to an amplifier stage, where
a second capacitor for frequency compensation is selectively connected in parallel to the first capacitor for frequency compensation, and is via a compensation switch,
wherein the first capacitor for frequency compensation and the second capacitor for frequency compensation or the compensation switch is connected to an input of the amplifier stage,
wherein a third capacitor for frequency compensation is connected in parallel to the amplifier stage at an output of an upstream amplifier stage,
wherein a fourth capacitor for frequency compensation is switched in parallel to the third capacitor for frequency compensation and is activatable or deactivatable via a second compensation switch, and
wherein another reference potential (Vbias) is connected between, on the one hand (i) the input of the amplifier stage, the terminal of the first capacitor for frequency compensation thereon and the terminal of the at least second capacitor or the compensation switch thereon, and, on the other hand (ii) the output of the upstream amplifier stage, the terminal of the third capacitor for frequency compensation thereon and the terminal of the fourth capacitor for frequency compensation or the second compensation switch thereon.
2. The amplifier of claim 1 , wherein the compensation switch comprises a switching resistor, which, when it is switched, creates a series circuit of an ohmic resistor in particular to the second capacitor for frequency compensation.
3. The amplifier of claim 1 , wherein
in a first clock phase (Φ 1 ), a first such switchable capacitor (Cf) and a second such switchable capacitor (Cs) are connectable in parallel to one another upstream from an amplifier input node (n) of the amplifier, and
in a second clock phase (Φ 2 ), the first switchable capacitor (Cf) and the second switchable capacitor (Cs) are connectable in series, in the second clock phase (Φ 1 ), the first switchable capacitor (Cf) being connected in parallel to the amplifier between the amplifier input nodes (n) and an amplifier output node (o).
4. The amplifier of claim 3 , wherein the compensation switch
is closed during the first clock phase (Φ 1 ) and connects the first capacitor for frequency compensation in parallel to the second capacitor for frequency compensation and
is opened during the second clock phase (Φ 2 ) and the first capacitor for frequency compensation is deactivated.
5. The amplifier of claim 4 , wherein a plurality of such nested and switched capacitors for frequency compensation are used as compensation capacitors in a so-called nested compensation.