IP Library Granted Patent US 8,330,190
Granted Patent B2
US 8,330,190 · App. 12/715,826 · Granted Dec 11, 2012

Semiconductor device

Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,330,190
App. No.
12/715,826
Granted
Dec 11, 2012
Kind
B2
Abstract

A semiconductor device includes a first metal layer disposed on a semiconductor substrate; an insulating layer disposed on the first metal layer; and a second metal layer disposed on the insulating layer and having an electrode pad surface exposed to the outside, wherein a recess is disposed in the insulating layer and the second metal layer; and at least the second metal layer is disposed in the recess of the insulating layer.

Claims (20)

1. A semiconductor device comprising:

a first metal layer disposed on a semiconductor substrate;

an insulating layer disposed on the first metal layer;

a second metal layer disposed on the insulating layer and having a first electrode pad surface and a second electrode pad surface exposed to the outside; and

a recess is disposed in a boundary between the first electrode pad surface and the second electrode pad surface in the insulating layer and the second metal layer,

wherein at least the second metal layer is disposed in the recess of the insulating layer.

2. The semiconductor device according to claim 1 , wherein the first electrode pad surface is a bonding region on which wire bonding is performed and the second electrode pad surface is a test region with which a probe needle is brought into contact in order to conduct a probing test.

3. The semiconductor device according to claim 1 , wherein an insulating film is disposed on a peripheral part of the first and second electrode pad surfaces.

4. The semiconductor device according to claim 3 , wherein the insulating film is disposed on the second metal layer.

5. The semiconductor device according to claim 4 , wherein the insulating film is disposed on the second metal layer disposed in the recess; and

a portion of the insulating film disposed on the second metal layer disposed in the recess has a shape that follows the shape of the recess.

6. The semiconductor device according to claim 1 , wherein a material making up the first metal layer includes copper.

7. The semiconductor device according to claim 1 , wherein a material making up the second metal layer includes aluminum.

8. The semiconductor device according to claim 1 , wherein the first and second electrode pad surfaces are substantially flat.

9. The semiconductor device according to claim 1 , wherein the recess comprises a plurality of recesses; and

the plurality of recesses are disposed in a line.

10. The semiconductor device according to claim 1 , wherein the recess comprises a plurality of recesses; and

the plurality of recesses are disposed in a first line and a second line.

11. The semiconductor device according to claim 10 , wherein the plurality of recesses are disposed in a staggered arrangement with respect to the first line and the second line.

12. The semiconductor device according to claim 1 , wherein the recess has a rectangular shape.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2010
From: SAITO, NORIAKI; SAWADA, TOYOJI
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 024027/0530 →
Priority Claims (1)
JP 2009-53197 · Mar 6, 2009 · national
Continuity (1)
Related Publication 20100224997A1 · Sep 9, 2010