Semiconductor device and method of forming wafer level multi-row etched lead package

1. A method of manufacturing a semiconductor device, comprising:

providing a base carrier having first and second opposing surfaces;

etching the first surface of the base carrier to form a plurality of cavities and base leads between the cavities extending between the first and second surfaces;

mounting a first semiconductor die within a cavity of the base carrier;

forming a first insulating layer over the first semiconductor die and first surface of the base carrier and into the cavities;

removing a portion of the first insulating layer to expose the first surface of the base carrier;

forming a first conductive layer over the first insulating layer and first surface of the base carrier;

forming a second insulating layer over the first insulating layer and first conductive layer; and

removing a portion of the second surface of the base carrier to expose the first insulating layer and electrically isolate the base leads.

2. The method of claim 1 , further including forming a second conductive layer over the second surface of the base carrier adjacent to the base leads.

3. The method of claim 1 , further including:

removing a portion of the second insulating layer to expose the first conductive layer; and

forming a shielding layer over the second insulating layer and first conductive layer.

4. The method of claim 1 , further including:

mounting a second semiconductor die to the first semiconductor die;

electrically connecting the second semiconductor die and base leads; and

depositing an encapsulant over the first and second semiconductor die and base carrier.

5. The method of claim 1 , further including:

forming a second conductive layer over the first conductive layer; and

forming a bump over the second conductive layer.

6. The method of claim 1 , further including:

forming a bump over the first conductive layer;

stacking a plurality of the semiconductor devices; and

electrically connecting the stacked semiconductor devices through the first conductive layer, base leads, and bump.

7. A method of manufacturing a semiconductor device, comprising:

providing a base carrier having first and second opposing surfaces;

etching the first surface of the base carrier to form a plurality of cavities and base leads between the cavities extending between the first and second surfaces;

mounting a first semiconductor die within a cavity of the base carrier;

forming a first insulating layer over the first semiconductor die and first surface of the base carrier and into the cavities;

forming a first conductive layer over the first insulating layer and first surface of the base carrier; and

removing a portion of the second surface of the base carrier to expose the first insulating layer and electrically isolate the base leads.

8. The method of claim 7 , further including:

forming a second insulating layer over the first insulating layer;

removing a portion of the second insulating layer to expose the first surface of the base carrier;

forming the first conductive layer over the second insulating layer and first surface of the base carrier; and

forming a third insulating layer over the second insulating layer and first conductive layer.

9. The method of claim 7 , further including forming a second conductive layer over the second surface of the base carrier adjacent to the base leads.

10. The method of claim 9 , wherein removing the portion of the second surface of the base carrier leaves a portion of the second conductive layer under the first semiconductor die.

11. The method of claim 7 , further including:

mounting a second semiconductor die to the first semiconductor die;

electrically connecting the second semiconductor die and base leads; and

depositing an encapsulant over the first and second semiconductor die and base carrier.

12. The method of claim 7 , further including:

forming a second conductive layer over the first conductive layer; and

forming a bump over the second conductive layer.

13. The method of claim 7 , further including:

forming a bump over the first conductive layer;

stacking a plurality of the semiconductor devices; and

electrically connecting the stacked semiconductor devices through the first conductive layer, base leads, and bump.

14. A method of manufacturing a semiconductor device, comprising:

providing a base carrier having first and second opposing surfaces;

etching the first surface of the base carrier to form a plurality of cavities and base leads between the cavities extending between the first and second surfaces;

forming a first insulating layer over the first surface of the base carrier and into the cavities;

forming a first conductive layer over the first insulating layer and first surface of the base carrier;

forming a second insulating layer over the first insulating layer and first conductive layer; and

removing a portion of the second surface of the base carrier to expose the first insulating layer and electrically isolate the base leads.

15. The method of claim 14 , further including mounting a first semiconductor die within a cavity of the base carrier prior to forming the first insulating layer.

16. The method of claim 15 , further including:

mounting a second semiconductor die to the first semiconductor die;

electrically connecting the second semiconductor die and base leads; and

depositing an encapsulant over the first and second semiconductor die and base carrier.

17. The method of claim 14 , further including forming a second conductive layer over the second surface of the base carrier adjacent to the base leads.

18. The method of claim 14 , further including:

removing a portion of the second insulating layer to expose the first conductive layer; and

forming a shielding layer over the second insulating layer and first conductive layer.

19. The method of claim 14 , further including:

forming a second conductive layer over the first conductive layer; and

forming a bump over the second conductive layer.

20. The method of claim 14 , further including:

forming a bump over the first conductive layer;

stacking a plurality of the semiconductor devices; and

electrically connecting the stacked semiconductor devices through the first conductive layer, base leads, and bump.