Method of manufacturing semiconductor device including wiring layout and semiconductor device
View Patent ↗A method of manufacturing a semiconductor device having a first wiring layer, a first interlayer insulating film, a second interlayer insulating film, a third interlayer insulating film, and a second wiring layer, in which the method includes depositing the second wiring layer on the third interlayer insulating film and, where the widths of first wiring layer and the second wiring layer are 10.0 μm or greater, executing one of etching the second wiring layer to set a width of 1.0 μm or greater in a portion where the first wiring layer and the second wiring layer overlap and etching the second wiring layer to seta horizontal distance of 2.0 μm or greater between adjacent portions of the first wiring layer and the second wiring layer.
1. A semiconductor device comprising:
an underlying insulating film formed on a semiconductor substrate;
a first wiring layer formed on a portion of the underlying insulating film;
a first interlayer insulating film formed on the underlying insulating film and the first wiring layer;
a second interlayer insulating film formed on concavities in the first interlayer insulating film by spin-coating and an etch-back process;
a third interlayer insulating film formed on the first interlayer insulating film and the second interlayer insulating film; and
a second wiring layer formed on the third interlayer insulating film,
wherein the first wiring layer and the second wiring layer have widths of 10.0 μm or greater, and
wherein an overlap portion where the first wiring layer and the second wiring layer overlap has an overlap width of 1.0 μm or greater, and
wherein the second wiring layer is disposed relative to the first wiring layer such that when a stress in a direction in which the first wiring layer and the second wiring layer pull away horizontally from each other is generated during manufacturing of the device, or while the device is in use, the first interlayer insulating film, the second interlayer insulating film and the third interlayer insulating film remain intact.
2. The semiconductor device according to claim 1 , further comprising:
at least one additional interlayer insulating film formed through spin-coating and an etch-back process;
at least one pair of interlayer insulating films formed to surround said at least one additional interlayer insulating film formed through the spin-coating and the etch-hack process; and
at least one additional wiring layer formed on an upside film in said at least one pair of the interlayer insulating films,
wherein at least one vertically adjacent pair of wiring layers among said at least one additional wiring layer and the second wiring layer has relative positions identical to the relative positions of the first wiring layer and the second wiring layer.
3. A semiconductor device comprising:
an underlying insulating film formed on a semiconductor substrate;
a first wiring layer formed on the underlying insulating film;
a first interlayer insulating film formed on a portion of the underlying insulating film and the first wiring layer;
a second interlayer insulating film formed on concavities in the first interlayer insulating film by in-coating and an etch-back process;
a third interlayer insulating film formed on the first interlayer insulating film and the second interlayer insulating film; and
a second wiring layer formed on the third interlayer insulating film,
wherein the first wiring layer and the second wiring layer have widths of 10.0 μm or greater, and
wherein a horizontal gap between adjacent portions of the first wiring layer and the second wiring layer is 2.0 μm or greater, and
wherein the second wiring layer is disposed relative to the first wiring layer such that when a stress in a direction in which the first wiring layer and the second wiring layer pull away horizontally from each other is generated during manufacturing of the device, or while the device is in use, the first interlayer insulating film, the second interlayer insulating film and the third interlayer insulating film remain intact.
4. The semiconductor device according to claim 3 , further comprising:
at least one additional interlayer insulating film formed through spin-coating and an etch-back process;
at least one pair of interlayer insulating films formed to surround said at least one additional interlayer insulating film formed through the spin-coating and the etch-back process; and
at least one additional wiring layer formed on an upside film in said at least one pair of the interlayer insulating films,
wherein at least one vertically adjacent pair of wiring layers among said at least one additional wiring layer and the second wiring layer has relative positions identical to the relative position of the first wiring layer and the second wiring layer.