IP Library Granted Patent US 8,772,182
Granted Patent B2
US 8,772,182 · App. 12/774,302 · Granted Jul 8, 2014

Semiconductor device having reinforced low-k insulating film and its manufacture method

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,772,182
App. No.
12/774,302
Granted
Jul 8, 2014
Kind
B2
Abstract

A semiconductor device manufacture method has the steps of: (a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film; and (d) forming a buried wiring including a wiring pattern in the high-level insulating film and a via conductor in the low-level insulating film. The low-level insulating film and high-level insulating film are made from the same material. The process of increasing the mechanical strength includes an ultraviolet ray irradiation process or a hydrogen plasma applying process.

Claims (17)

1. A semiconductor device manufacture method comprising the steps of:

(a) forming a first insulating film of first porous silicon oxide, having a mechanical strength of a first value above a semiconductor substrate using spin-coating;

(b) processing said first insulating film to increase the mechanical strength of the first insulating film from the first value to a second value;

(c) after the step (b), forming a second insulating film of second porous silicon oxide, having a mechanical strength of a third value lower than the second value above said first insulating film using spin-coating; and

(d) forming a buried wiring including a wiring pattern in said second insulating film and a via conductor in said first insulating film.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein said step (b) induces cross-linking reactions in said first insulating film.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein said step (b) includes irradiating ultraviolet rays.

4. The method of manufacturing a semiconductor device according to claim 3 , wherein said ultraviolet rays contain a component having a wavelength in a range of 200 nm to 300 nm.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein said step (b) includes processing by hydrogen plasma.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein said steps (a) and (c) coat a same starting material for a porous insulating material.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein said steps (a) and (c) include a step of baking the coated film at a plurality of gradually rising baking temperatures.

8. The method of manufacturing a semiconductor device according to claim 7 , wherein said step (b) is performed by heating the semiconductor substrate at a temperature equal to or higher than a highest one of said plurality of baking temperatures.

9. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of:

(e) forming a third insulating film formed of a material different from the first and second insulating films and functioning as an etch stopper on said first insulating film, between said steps (b) and (c),

wherein said step (d) includes the step of forming a via hole through said second insulating film to said first insulating film and the step of forming a wiring pattern trench at least in said second insulating film by using said third insulating film as the etch stopper.

10. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of:

(f) after said step (d), forming an insulating copper diffusion preventive film on said high-level insulating film, said insulating copper diffusion preventive film covering said buried wiring.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →