SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
The present invention provides a technique capable of realizing an ESD protection performance having a high ESD withstand voltage in a small layout area. An ESD protection circuit includes a clamping circuit, Zener diodes, a transistor comprised of a DMOS, a transistor comprised of an IGBT, and resistors. The ESD protection circuit effectively protects the protected circuit such that the transistor comprised of the DMOS is caused to absorb the current noise at the time of operating the protected circuit to prevent malfunction due to latchup and the IGBT (the transistor comprised of IGBT) whose current absorption capacity is increased by the thyristor effect is operated in parallel for a large current at the time of ESD.
1 . A semiconductor integrated circuit device comprising an ESD protection circuit for protecting against ESD at an input/output terminal thereof,
wherein the ESD protection circuit includes:
a first clamping circuit one terminal of which is coupled to the input/output terminal;
a second clamping circuit one terminal of which is coupled to the output portion of the first clamping circuit;
a third clamping circuit one terminal of which is coupled to the output portion of the second clamping circuit and the other terminal of which is coupled to a reference potential;
a first transistor one coupling portion of which is coupled to the input/output terminal, the other coupling portion of which is coupled to the reference potential and the gate of which is coupled to the other terminal of the first clamping circuit;
a second transistor one coupling portion of which is coupled to the input/output terminal, the other coupling portion of which is coupled to the reference potential and the gate of which is coupled to the other terminal of the second clamping circuit;
a first resistor coupled between the gate of the first transistor and the reference potential; and
a second resistor coupled between the gate of the second transistor and the reference potential.
2 . The semiconductor integrated circuit device according to claim 1 ,
wherein the second resistor is any one of an IGBT, a VDMOS, an LDMOS, or a thyristor.
3 . The semiconductor integrated circuit device according to claim 1 ,
wherein each of the first to the third clamping circuit includes one or more Zener diodes coupled in the reverse direction.
4 . The semiconductor integrated circuit device according to claim 1 ,
wherein each of the first to the third clamping circuit includes one or more diodes coupled in the forward direction.
5 . The semiconductor integrated circuit device according to claim 1
wherein each of the first to the third clamping circuit includes one or more diodes in which a MOS transistor is diode-connected and which are coupled in the forward direction.
6 . The semiconductor integrated circuit device according to claim 2 ,
wherein each of the first to the third clamping circuit includes one or more Zener diodes coupled in the reverse direction.
7 . The semiconductor integrated circuit device according to claim 2 ,
wherein each of the first to the third clamping circuit includes one or more diodes coupled in the forward direction.
8 . The semiconductor integrated circuit device according to claim 2 ,
wherein each of the first to the third clamping circuit includes one or more diodes in which a MOS transistor is diode-connected and which are coupled in the forward direction.