IP Library Granted Patent US 7,977,158
Granted Patent B2
US 7,977,158 · App. 12/805,048 · Granted Jul 12, 2011

Manufacturing method for electronic devices

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Quick Facts
Patent No.
US 7,977,158
App. No.
12/805,048
Granted
Jul 12, 2011
Kind
B2
Abstract

A manufacturing method for an electronic device joining a first metallic bond part formed on a first electronic component and a second metallic bond part formed on a second electronic component includes a first process for placing the first metallic bond part directly against the second metallic bond part, applying pressure to the first electronic component and the second electronic component, joining the first metallic bond part to the second metallic bond part with solid-phase diffusion, and releasing the applied pressure, and a second process for heating the first electronic component and the second electronic component at a predetermined temperature such that the first metallic bond part and the second metallic bond part are joined together by melting the first metallic bond part and the second metallic bond part.

Claims (30)

1. A manufacturing method for an electronic device joining a first metallic bond part formed on a first electronic component and a second metallic bond part formed on a second electronic component, the manufacturing method comprising:

a first process for:

placing the first metallic bond part directly against the second metallic bond part;

applying pressure to the first electronic component and the second electronic component;

joining the first metallic bond part to the second metallic bond part with solid-phase diffusion; and

releasing the applied pressure; and

a second process for:

heating the first electronic component and the second electronic component at a predetermined temperature such that the first metallic bond part and the second metallic bond part are joined together by melting the first metallic bond part and the second metallic bond part.

2. The manufacturing method according to claim 1 , further comprising:

forming the first electronic component on a support piece before the first process.

3. The manufacturing method according to claim 2 , wherein the support piece has a heat expansion coefficient near a heat expansion coefficient of the second electronic component.

4. The manufacturing method according to claim 2 , wherein a heat expansion coefficient of the support piece is the same as a heat expansion coefficient of the second electronic component.

5. The manufacturing method according to claim 2 , wherein the support piece and the second electronic component comprise a same material.

6. The manufacturing method according to claim 2 , wherein the support piece comprises a substrate comprising a silicon wafer, glass, or ceramic materials.

7. The manufacturing method according to claim 2 , wherein the second electronic component comprises a semiconductor chip, the semiconductor chip comprising a through-silicon via.

8. The manufacturing method according to claim 2 , wherein the second electronic component comprises a plurality of semiconductor chips, the semiconductor chips being stacked on each other, and

wherein each of the semiconductor chips comprises a through-silicon via.

9. The manufacturing method according to claim 8 , wherein said through-silicon via is connected to through-silicon vias of other semiconductor chips.

10. The manufacturing method according to claim 2 , further comprising:

mounting the first electronic component and the support piece on a heating stage.

11. The manufacturing method according to claim 1 , further comprising:

clamping the second electronic component to the first electronic component, prior to said applying pressure.

12. The manufacturing method according to claim 1 , wherein the first electronic component comprises a wiring piece comprising alternate laminations of insulating layers and wiring layers.

13. The manufacturing method according to claim 1 , wherein the first metallic bond part is formed on a surface of the first electronic component.

14. The manufacturing method according to claim 1 , further comprising:

mounting a plurality of laminated pieces of the second electronic component adjacently on a surface of the first electronic component.

15. The manufacturing method according to claim 14 , further comprising:

press heating said plurality of laminated pieces of the second electronic component mounted on the surface of the first electronic component.

16. The manufacturing method according to claim 15 , wherein said press heating comprises:

applying pressure to a support piece of the first electronic component, the first electronic component, and said plurality of laminated pieces, to simultaneously clamp the first electronic component and said plurality of laminated pieces in their relative positions.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 053654 FRAME: 0254. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 10, 2021
From: STARBOARD VALUE INTERMEDIATE FUND LP
To: ACACIA RESEARCH GROUP LLC
Reel/Frame 057454/0045 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED ON REEL 052853 FRAME 0153. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Mar 2, 2021
From: ACACIA RESEARCH GROUP LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 056775/0066 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jul 8, 2020
From: STARBOARD VALUE INTERMEDIATE FUND LP
To: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
Reel/Frame 053654/0254 →
PATENT SECURITY AGREEMENT Recorded Jun 5, 2020
From: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MERTON ACQUISITION HOLDCO LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 052853/0153 →