IP Library Granted Patent US 7,959,073
Granted Patent B2
US 7,959,073 · App. 12/826,062 · Granted Jun 14, 2011

Method and system for random data access for security applications

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Quick Facts
Patent No.
US 7,959,073
App. No.
12/826,062
Granted
Jun 14, 2011
Kind
B2
Abstract

A method for securely handling processing of information in a chip may include randomly selecting one of a plurality of data processes based on a random process index. A time interval may be randomly allocated on the chip, for processing the randomly selected one of the plurality of data processes. When the randomly allocated time interval has elapsed, the randomly selected one of the plurality of data processes may be initiated. The randomly selected one of the plurality of data processes may include one or both of accessing data and acquiring the data. Data may be verified by the randomly selected one of the plurality of data processes prior to the processing of the data. The data may be verified utilizing at least one digital signature verification algorithm, such as a Rivest-Shamir-Adelman (RSA) algorithm and/or a secure hash algorithm (SHA-1).

Claims (25)

1. A method for securely handling processing of information, the method comprising:

in a chip:

randomly selecting one of a plurality of data processes based on a random process index;

randomly allocating a time interval for processing said randomly selected one of said plurality of data processes; and

when said randomly allocated time interval has elapsed, initiating said randomly selected one of said plurality of data processes.

2. The method according to claim 1 , wherein said randomly selected one of said plurality of data processes comprises one or both of accessing data and acquiring said data.

3. The method according to claim 1 , comprising verifying data by said randomly selected one of said plurality of data processes prior to said processing of said data.

4. The method according to claim 3 , comprising verifying said data utilizing at least one digital signature verification algorithm.

5. The method according to claim 4 , wherein said at least one digital signature verification algorithm comprises one or both of a Rivest-Shamir-Adelman (RSA) algorithm and a secure hash algorithm (SHA-1).

6. A system for securely handling processing of information, the system comprising:

a memory access module within a chip, said memory access module enables random selection on said chip of one of a plurality of data processes based on a random process index;

a random number generator that enables random allocation on said chip of a time interval for processing said randomly selected one of said plurality of data processes; and

one or both of said memory access module and/or said random number generator enables initiating of said randomly selected one of said plurality of data processes, when said randomly allocated time interval has elapsed.

7. The system according to claim 6 , wherein said randomly selected one of said plurality of data processes comprises one or both of accessing data and acquiring said data.

8. The system according to claim 6 , wherein said randomly selected one of said plurality of data processes verifies data prior to said processing of said data.

9. The system according to claim 8 , wherein said randomly selected one of said plurality of data processes verifies said data utilizing at least one digital signature verification algorithm.

10. The system according to claim 9 , wherein said at least one digital signature verification algorithm comprises one or both of a Rivest-Shamir-Adelman (RSA) algorithm and a secure hash algorithm (SHA-1).

11. A system for securely handling processing of information, the system comprising:

one or more circuits in a chip, said one or more circuits enables random selection on said chip, of one of a plurality of data processes based on a random process index;

said one or more circuits enables random allocation on said chip, of a time interval for processing said randomly selected one of said plurality of data processes; and

said one or more circuits enables initiation on said chip, of said randomly selected one of said plurality of data processes, when said randomly allocated time interval has elapsed.

12. The system according to claim 11 , wherein said randomly selected one of said plurality of data processes comprises one or both of accessing data and acquiring said data.

13. The system according to claim 11 , wherein said randomly selected one of said plurality of data processes verifies said data prior to said processing of said data.

14. The system according to claim 13 , wherein said randomly selected one of said plurality of data processes verifies said data utilizing at least one digital signature verification algorithm.

15. The system according to claim 14 , wherein said at least one digital signature verification algorithm comprises one or both of a Rivest-Shamir-Adelman (RSA) algorithm and a secure hash algorithm (SHA-1).

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
Continuity (2)
Continuation 11069204 · Feb 28, 2005
Related Publication 20100306556A1 · Dec 2, 2010