IP Library Granted Patent US 8,049,982
Granted Patent B1
US 8,049,982 · App. 12/847,676 · Granted Nov 1, 2011

Methods and apparatus for measuring servo address mark distance in a read channel using selective fine phase estimate

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,049,982
App. No.
12/847,676
Granted
Nov 1, 2011
Kind
B1
Abstract

Methods and apparatus are provided for measuring servo address mark distance in a read channel using selective fine phase estimates. A distance between servo address marks (SAMs) in servo data of a magnetic recording media can be computed by obtaining a count of a number of time intervals between SAM patterns; obtaining a plurality of fractional phase estimates; selecting at least one of the plurality of fractional phase estimates as a selected fractional phase estimate based on a selection criteria; and combining the count and the selected fractional phase estimate to compute the distance. The fractional phase estimates can include a first fractional phase estimate having a lower resolution and higher accuracy in the presence of frequency errors relative to a second fractional phase estimate and wherein the second fractional phase estimate has more resolution and lower accuracy in the presence of the frequency errors relative to the first fractional phase estimate. The selection criteria can comprise a frequency error threshold.

Claims (33)

1. A method for computing a distance between servo address marks (SAMs) in servo data of a magnetic recording media, comprising:

obtaining a count of a number of time intervals between SAM patterns;

obtaining a plurality of fractional phase estimates;

selecting at least one of said plurality of fractional phase estimates as a selected fractional phase estimate based on a selection criteria; and

combining said count and said selected fractional phase estimate to compute said distance.

2. The method of claim 1 , wherein said plurality of fractional phase estimates comprises a first fractional phase estimate having a lower resolution and higher accuracy in the presence of frequency errors relative to a second fractional phase estimate and wherein said second fractional phase estimate has more resolution and lower accuracy in the presence of said frequency errors relative to said first fractional phase estimate.

3. The method of claim 1 , wherein said plurality of fractional phase estimates comprises a settled phase of a Digital Phase Lock Loop (DPLL).

4. The method of claim 1 , wherein said plurality of fractional phase estimates comprises a SAM Found phase value.

5. The method of claim 4 , wherein said SAM Found phase value is based on a selected phase from a plurality of interpolated phases.

6. The method of claim 1 , wherein said selection criteria comprises a frequency error threshold.

7. The method of claim 1 , wherein said step of combining said count and said selected fractional phase estimate further comprises the step of adding said count and said selected fractional phase estimate.

8. A system for computing a distance between servo address marks (SAMs) in servo data of a magnetic recording media, the system comprising:

at least one processor operative to:

obtain a count of a number of time intervals between SAM patterns;

obtain a plurality of fractional phase estimates;

select at least one of said plurality of fractional phase estimates as a selected fractional phase estimate based on a selection criteria; and

combine said count and said selected fractional phase estimate to compute said distance.

9. The system of claim 8 , wherein said plurality of fractional phase estimates comprises a first fractional phase estimate having a lower resolution and higher accuracy in the presence of frequency errors relative to a second fractional phase estimate and wherein said second fractional phase estimate has more resolution and lower accuracy in the presence of said frequency errors relative to said first fractional phase estimate.

10. The system of claim 8 , wherein said plurality of fractional phase estimates comprises a settled phase of a Digital Phase Lock Loop (DPLL).

11. The system of claim 8 , wherein said plurality of fractional phase estimates comprises a SAM Found phase value.

12. The system of claim 11 , wherein said SAM Found phase value is based on a selected phase from a plurality of interpolated phases.

13. The system of claim 8 , wherein said selection criteria comprises a frequency error threshold.

14. The system of claim 8 , wherein said count and said selected fractional phase estimate are combined by adding said count and said selected fractional phase estimate.

15. An integrated circuit for computing a distance between servo address marks (SAMs) in servo data of a magnetic recording media, the integrated circuit operative to perform operations comprising:

obtaining a count of a number of time intervals between SAM patterns;

obtaining a plurality of fractional phase estimates;

selecting at least one of said plurality of fractional phase estimates as a selected fractional phase estimate based on a selection criteria; and

combining said count and said selected fractional phase estimate to compute said distance.

16. The integrated circuit of claim 15 , wherein said plurality of fractional phase estimates comprises a first fractional phase estimate having a lower resolution and higher accuracy in the presence of frequency errors relative to a second fractional phase estimate and wherein said second fractional phase estimate has more resolution and lower accuracy in the presence of said frequency errors relative to said first fractional phase estimate.

17. The integrated circuit of claim 15 , wherein said plurality of fractional phase estimates comprises a settled phase of a Digital Phase Lock Loop (DPLL).

18. The integrated circuit of claim 15 , wherein said plurality of fractional phase estimates comprises a SAM Found phase value.

19. The integrated circuit of claim 15 , wherein said selection criteria comprises a frequency error threshold.

20. The integrated circuit of claim 15 , wherein said step of combining said count and said selected fractional phase estimate further comprises the step of adding said count and said selected fractional phase estimate.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2010
From: GRUNDVIG, JEFFREY P.; ANNAMPEDU, VISWANATH; ZHANG, XUN
To: LSI CORPORATION
Reel/Frame 025457/0185 →